summaryrefslogtreecommitdiff
path: root/src/cpu/o3/rename_impl.hh
diff options
context:
space:
mode:
authorRekai Gonzalez-Alberquilla <rekai.gonzalezalberquilla@arm.com>2017-02-06 11:10:06 +0000
committerGiacomo Gabrielli <giacomo.gabrielli@arm.com>2018-11-16 10:39:03 +0000
commit0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268 (patch)
tree7679abe2343e0504c93eb73d09635d546a211455 /src/cpu/o3/rename_impl.hh
parent338a173e822298bd22741342a7b24352450afdd1 (diff)
downloadgem5-0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268.tar.xz
cpu: Fix the usage of const DynInstPtr
Summary: Usage of const DynInstPtr& when possible and introduction of move operators to RefCountingPtr. In many places, scoped references to dynamic instructions do a copy of the DynInstPtr when a reference would do. This is detrimental to performance. On top of that, in case there is a need for reference tracking for debugging, the redundant copies make the process much more painful than it already is. Also, from the theoretical point of view, a function/method that defines a convenience name to access an instruction should not be considered an owner of the data, i.e., doing a copy and not a reference is not justified. On a related topic, C++11 introduces move semantics, and those are useful when, for example, there is a class modelling a HW structure that contains a list, and has a getHeadOfList function, to prevent doing a copy to an internal variable -> update pointer, remove from the list -> update pointer, return value making a copy to the assined variable -> update pointer, destroy the returned value -> update pointer. Change-Id: I3bb46c20ef23b6873b469fd22befb251ac44d2f6 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/13105 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/o3/rename_impl.hh')
-rw-r--r--src/cpu/o3/rename_impl.hh10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh
index bc024f603..a295a8705 100644
--- a/src/cpu/o3/rename_impl.hh
+++ b/src/cpu/o3/rename_impl.hh
@@ -524,8 +524,6 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
++renameRunCycles;
}
- DynInstPtr inst;
-
// Will have to do a different calculation for the number of free
// entries.
int free_rob_entries = calcFreeROBEntries(tid);
@@ -596,7 +594,7 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
assert(!insts_to_rename.empty());
- inst = insts_to_rename.front();
+ DynInstPtr inst = insts_to_rename.front();
//For all kind of instructions, check ROB and IQ first
//For load instruction, check LQ size and take into account the inflight loads
@@ -787,7 +785,7 @@ DefaultRename<Impl>::sortInsts()
{
int insts_from_decode = fromDecode->size;
for (int i = 0; i < insts_from_decode; ++i) {
- DynInstPtr inst = fromDecode->insts[i];
+ const DynInstPtr &inst = fromDecode->insts[i];
insts[inst->threadNumber].push_back(inst);
#if TRACING_ON
if (DTRACE(O3PipeView)) {
@@ -1008,7 +1006,7 @@ DefaultRename<Impl>::removeFromHistory(InstSeqNum inst_seq_num, ThreadID tid)
template <class Impl>
inline void
-DefaultRename<Impl>::renameSrcRegs(DynInstPtr &inst, ThreadID tid)
+DefaultRename<Impl>::renameSrcRegs(const DynInstPtr &inst, ThreadID tid)
{
ThreadContext *tc = inst->tcBase();
RenameMap *map = renameMap[tid];
@@ -1068,7 +1066,7 @@ DefaultRename<Impl>::renameSrcRegs(DynInstPtr &inst, ThreadID tid)
template <class Impl>
inline void
-DefaultRename<Impl>::renameDestRegs(DynInstPtr &inst, ThreadID tid)
+DefaultRename<Impl>::renameDestRegs(const DynInstPtr &inst, ThreadID tid)
{
ThreadContext *tc = inst->tcBase();
RenameMap *map = renameMap[tid];