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authorNathan Binkert <binkertn@umich.edu>2006-12-20 22:20:11 -0800
committerNathan Binkert <binkertn@umich.edu>2006-12-20 22:20:11 -0800
commit9aecfb3e3bfe1b85db9468bad287f22a2eb9bd4e (patch)
treed4b2cbff99ca89ea77011552ab5e57b2435b1326 /src/cpu/o3/rename_map.cc
parent4b3538b609cfcce0891ee5ef7d690646a6030166 (diff)
downloadgem5-9aecfb3e3bfe1b85db9468bad287f22a2eb9bd4e.tar.xz
don't use (*activeThreads).begin(), use activeThreads->blah().
Also don't call (*activeThreads).end() over and over. Just call activeThreads->end() once and save the result. Make sure we always check that there are elements in the list before we grab the first one. --HG-- extra : convert_revision : d769d8ed52da99532d57a9bbc93e92ddf22b7e58
Diffstat (limited to 'src/cpu/o3/rename_map.cc')
-rw-r--r--src/cpu/o3/rename_map.cc5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc
index befbc3e8a..620daf691 100644
--- a/src/cpu/o3/rename_map.cc
+++ b/src/cpu/o3/rename_map.cc
@@ -180,6 +180,8 @@ SimpleRenameMap::rename(RegIndex arch_reg)
// Subtract off the base offset for miscellaneous registers.
arch_reg = arch_reg - numLogicalRegs;
+ DPRINTF(Rename, "Renamed misc reg %d\n", arch_reg);
+
// No renaming happens to the misc. registers. They are
// simply the registers that come after all the physical
// registers; thus take the base architected register and add
@@ -194,6 +196,9 @@ SimpleRenameMap::rename(RegIndex arch_reg)
assert(renamed_reg < numPhysicalRegs + numMiscRegs);
}
+ DPRINTF(Rename, "Renamed reg %d to physical reg %d old mapping was %d\n",
+ arch_reg, renamed_reg, prev_reg);
+
return RenameInfo(renamed_reg, prev_reg);
}