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authorIru Cai <mytbk920423@gmail.com>2019-02-28 17:07:16 +0800
committerIru Cai <mytbk920423@gmail.com>2019-03-20 15:30:35 +0800
commitc1595689b1bfbb02fc50497c335dfa54327f0dd8 (patch)
treee633024f7e8e7567d3d76665be0f4fedae5ff72c /src/cpu/o3/rob.hh
parentf54020eb8155371725ab75b0fc5c419287eca084 (diff)
downloadgem5-c1595689b1bfbb02fc50497c335dfa54327f0dd8.tar.xz
invisispec-1.0 source
Diffstat (limited to 'src/cpu/o3/rob.hh')
-rw-r--r--src/cpu/o3/rob.hh4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/o3/rob.hh b/src/cpu/o3/rob.hh
index 1c3cc2815..7024d9920 100644
--- a/src/cpu/o3/rob.hh
+++ b/src/cpu/o3/rob.hh
@@ -212,6 +212,10 @@ class ROB
/** Updates the tail instruction with the new youngest instruction. */
void updateTail();
+ /** [SafeSpce] Updates load instructions visible condition
+ * set isPrevInstsCompleted and isPrevBrsResolved. */
+ void updateVisibleState();
+
/** Reads the PC of the oldest head instruction. */
// uint64_t readHeadPC();