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author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-05-31 15:50:11 +0800 |
commit | a4c6e88d766858b675a7fd256df5a8b9a7e18ada (patch) | |
tree | a00f59eea3e87c31eb9efbce9f8d6f397ae16db2 /src/cpu/o3/rob_impl.hh | |
parent | 866b200c202dded37fdd857a1a42ec149bd109c9 (diff) | |
download | gem5-a4c6e88d766858b675a7fd256df5a8b9a7e18ada.tar.xz |
import invisispec-1.0 source by Mengjia Yan
The original code is at https://github.com/mjyan0720/InvisiSpec-1.0
This code is rebased on upstream gem5 commit 866b200c, which features:
- rdtscp support
- some C++ code optimizations
- newer Linux kernel version number in SE mode
Diffstat (limited to 'src/cpu/o3/rob_impl.hh')
-rw-r--r-- | src/cpu/o3/rob_impl.hh | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh index 3a0140b9f..691149e67 100644 --- a/src/cpu/o3/rob_impl.hh +++ b/src/cpu/o3/rob_impl.hh @@ -405,6 +405,85 @@ ROB<Impl>::doSquash(ThreadID tid) } +/* ************************** + * [InvisiSpec] update load insts state + * isPrevInstsCompleted; isPrevBrsResolved + * *************************/ +template <class Impl> +void +ROB<Impl>::updateVisibleState() +{ + list<ThreadID>::iterator threads = activeThreads->begin(); + list<ThreadID>::iterator end = activeThreads->end(); + + while (threads != end) { + ThreadID tid = *threads++; + + if (instList[tid].empty()) + continue; + + InstIt inst_it = instList[tid].begin(); + InstIt tail_inst_it = instList[tid].end(); + + bool prevInstsComplete=true; + bool prevBrsResolved=true; + bool prevInstsCommitted=true; + bool prevBrsCommitted=true; + + while (inst_it != tail_inst_it) { + DynInstPtr inst = *inst_it++; + + assert(inst!=0); + + if (!prevInstsComplete && + !prevBrsResolved) { + break; + } + + if (inst->isLoad()) { + if (prevInstsComplete) { + inst->setPrevInstsCompleted(); + } + if (prevBrsResolved){ + inst->setPrevBrsResolved(); + } + if (prevInstsCommitted) { + inst->setPrevInstsCommitted(); + } + if (prevBrsCommitted) { + inst->setPrevBrsCommitted(); + } + } + + // Update prev control insts state + if (inst->isControl()){ + prevBrsCommitted = false; + if (!inst->readyToCommit() || inst->getFault()!=NoFault + || inst->isSquashed()){ + prevBrsResolved = false; + } + } + + prevInstsCommitted = false; + + // Update prev insts state + if (inst->isNonSpeculative() || inst->isStoreConditional() + || inst->isMemBarrier() || inst->isWriteBarrier() || + (inst->isLoad() && inst->strictlyOrdered())){ + //Some special instructions, directly set canCommit + //when entering ROB + prevInstsComplete = false; + } + if (!inst->readyToCommit() || inst->getFault()!=NoFault + || inst->isSquashed()){ + prevInstsComplete = false; + } + + } + } +} + + template <class Impl> void ROB<Impl>::updateHead() |