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authorNilay Vaish <nilay@cs.wisc.edu>2012-02-10 08:37:28 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2012-02-10 08:37:28 -0600
commit8f7e03d4cf4810fa3e09b134c2cf5b6df78a39b0 (patch)
tree40f6b9425dd1b0d2c2f622abc1a8c254ab0cec01 /src/cpu/o3/rob_impl.hh
parent0e597e944ae0cf368df06235e832bc441cb4e022 (diff)
downloadgem5-8f7e03d4cf4810fa3e09b134c2cf5b6df78a39b0.tar.xz
O3 CPU: Provide the squashing instruction
This patch adds a function to the ROB that will get the squashing instruction from the ROB's list of instructions. This squashing instruction is used for figuring out the macroop from which the fetch stage should fetch the microops. Further, a check has been added that if the instructions are to be fetched from the cache maintained by the fetch stage, then the data in the cache should be valid and the PC of the thread being fetched from is same as the address of the cache block.
Diffstat (limited to 'src/cpu/o3/rob_impl.hh')
-rw-r--r--src/cpu/o3/rob_impl.hh11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh
index 0484f519c..ee4a9e576 100644
--- a/src/cpu/o3/rob_impl.hh
+++ b/src/cpu/o3/rob_impl.hh
@@ -544,3 +544,14 @@ ROB<Impl>::regStats()
.desc("The number of ROB writes");
}
+template <class Impl>
+typename Impl::DynInstPtr
+ROB<Impl>::findInst(ThreadID tid, InstSeqNum squash_inst)
+{
+ for (InstIt it = instList[tid].begin(); it != instList[tid].end(); it++) {
+ if ((*it)->seqNum == squash_inst) {
+ return *it;
+ }
+ }
+ return NULL;
+}