diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2007-04-22 17:50:43 +0000 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2007-04-22 17:50:43 +0000 |
commit | acc62514b1a4244182a7e5fad8ca03505389d94d (patch) | |
tree | 29e96f23f04f19c16a9fdf1f7ef5fa9d7f23b277 /src/cpu/o3/scoreboard.cc | |
parent | cea543576082ed860e8dae17519ace48e5b2c78a (diff) | |
download | gem5-acc62514b1a4244182a7e5fad8ca03505389d94d.tar.xz |
Make the floating point zero register special handling only apply for ALPHA.
--HG--
extra : convert_revision : 4f393a5471656b29cecbacfcb337992239775915
Diffstat (limited to 'src/cpu/o3/scoreboard.cc')
-rw-r--r-- | src/cpu/o3/scoreboard.cc | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/cpu/o3/scoreboard.cc b/src/cpu/o3/scoreboard.cc index 1859b35a4..e7f8b7949 100644 --- a/src/cpu/o3/scoreboard.cc +++ b/src/cpu/o3/scoreboard.cc @@ -29,6 +29,7 @@ * Kevin Lim */ +#include "arch/isa_specific.hh" #include "cpu/o3/scoreboard.hh" Scoreboard::Scoreboard(unsigned activeThreads, @@ -79,11 +80,18 @@ Scoreboard::name() const bool Scoreboard::getReg(PhysRegIndex phys_reg) { +#if THE_ISA == ALPHA_ISA // Always ready if int or fp zero reg. if (phys_reg == zeroRegIdx || phys_reg == (zeroRegIdx + numPhysicalIntRegs)) { return 1; } +#else + // Always ready if int zero reg. + if (phys_reg == zeroRegIdx) { + return 1; + } +#endif return regScoreBoard[phys_reg]; } @@ -99,11 +107,18 @@ Scoreboard::setReg(PhysRegIndex phys_reg) void Scoreboard::unsetReg(PhysRegIndex ready_reg) { +#if THE_ISA == ALPHA_ISA if (ready_reg == zeroRegIdx || ready_reg == (zeroRegIdx + numPhysicalIntRegs)) { // Don't do anything if int or fp zero reg. return; } +#else + if (ready_reg == zeroRegIdx) { + // Don't do anything if int zero reg. + return; + } +#endif regScoreBoard[ready_reg] = 0; } |