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| author | Lisa Hsu <hsul@eecs.umich.edu> | 2007-01-26 12:51:07 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2007-01-26 12:51:07 -0500 |
| commit | 202d7f62b9ea11e6b72c4b15ff818549ea14f038 (patch) | |
| tree | f5f217121b907fe9cb78243dc35fcc12f17f596e /src/cpu/o3/sparc | |
| parent | 01c959aeaf7f4c6e15bae9d8de227b6d2cbb7ae1 (diff) | |
| download | gem5-202d7f62b9ea11e6b72c4b15ff818549ea14f038.tar.xz | |
eliminate cpu checkInterrupts bool, it is redundant and unnecessary.
--HG--
extra : convert_revision : 58e960e5019f944c7ec5606e4b8c93ce42330719
Diffstat (limited to 'src/cpu/o3/sparc')
| -rw-r--r-- | src/cpu/o3/sparc/cpu_impl.hh | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/o3/sparc/cpu_impl.hh b/src/cpu/o3/sparc/cpu_impl.hh index 536a620bf..66bf7d1c0 100644 --- a/src/cpu/o3/sparc/cpu_impl.hh +++ b/src/cpu/o3/sparc/cpu_impl.hh @@ -245,7 +245,6 @@ SparcO3CPU<Impl>::processInterrupts(Fault interrupt) this->interrupts.updateIntrInfo(this->threadContexts[0]); DPRINTF(O3CPU, "Interrupt %s being handled\n", interrupt->name()); - this->checkInterrupts = false; this->trap(interrupt, 0); } |