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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-16 07:32:06 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-16 07:32:06 -0500 |
| commit | 37b9966eb466b1655f0d4e604bafa729a3aaea6a (patch) | |
| tree | f4e3b34b69f2445db9f688a819bf2b1d8f007ecd /src/cpu/o3/sparc | |
| parent | 4d66ddbe35252d3d70a0c3d25d100672db5f1ef9 (diff) | |
| download | gem5-37b9966eb466b1655f0d4e604bafa729a3aaea6a.tar.xz | |
Made branch delay slots get squashed, and passed back an NPC and NNPC to start fetching from.
--HG--
extra : convert_revision : a2e4845fedf113b5a2fd92d3d28ce5b006278103
Diffstat (limited to 'src/cpu/o3/sparc')
| -rw-r--r-- | src/cpu/o3/sparc/dyn_inst.hh | 4 | ||||
| -rw-r--r-- | src/cpu/o3/sparc/dyn_inst_impl.hh | 7 |
2 files changed, 6 insertions, 5 deletions
diff --git a/src/cpu/o3/sparc/dyn_inst.hh b/src/cpu/o3/sparc/dyn_inst.hh index fda99cb6c..e95ae2fd5 100644 --- a/src/cpu/o3/sparc/dyn_inst.hh +++ b/src/cpu/o3/sparc/dyn_inst.hh @@ -56,8 +56,8 @@ class SparcDynInst : public BaseDynInst<Impl> public: /** BaseDynInst constructor given a binary instruction. */ - SparcDynInst(TheISA::ExtMachInst inst, Addr PC, - Addr Pred_PC, InstSeqNum seq_num, O3CPU *cpu); + SparcDynInst(TheISA::ExtMachInst inst, Addr PC, Addr NPC, + Addr Pred_PC, Addr Pred_NPC, InstSeqNum seq_num, O3CPU *cpu); /** BaseDynInst constructor given a static inst pointer. */ SparcDynInst(StaticInstPtr &_staticInst); diff --git a/src/cpu/o3/sparc/dyn_inst_impl.hh b/src/cpu/o3/sparc/dyn_inst_impl.hh index b830ee7bd..c4d30b6f4 100644 --- a/src/cpu/o3/sparc/dyn_inst_impl.hh +++ b/src/cpu/o3/sparc/dyn_inst_impl.hh @@ -31,9 +31,10 @@ #include "cpu/o3/sparc/dyn_inst.hh" template <class Impl> -SparcDynInst<Impl>::SparcDynInst(TheISA::ExtMachInst inst, Addr PC, - Addr Pred_PC, InstSeqNum seq_num, O3CPU *cpu) - : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu) +SparcDynInst<Impl>::SparcDynInst(TheISA::ExtMachInst inst, + Addr PC, Addr NPC, Addr Pred_PC, Addr Pred_NPC, + InstSeqNum seq_num, O3CPU *cpu) + : BaseDynInst<Impl>(inst, PC, NPC, Pred_PC, Pred_NPC, seq_num, cpu) { initVars(); } |