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authorAli Saidi <Ali.Saidi@ARM.com>2011-08-19 15:08:07 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2011-08-19 15:08:07 -0500
commitb6203360ef684a8dc32981221336f5d216ce2668 (patch)
treee4c8e7b374b2685f19016b0f3e79633a858ef8d2 /src/cpu/o3/store_set.hh
parent5f425b8bd1ac70b61fc57b7ec44c52cd7d8de9fb (diff)
downloadgem5-b6203360ef684a8dc32981221336f5d216ce2668.tar.xz
LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper.
This patch improves performance by as much as 10% on some spec benchmarks.
Diffstat (limited to 'src/cpu/o3/store_set.hh')
-rw-r--r--src/cpu/o3/store_set.hh18
1 files changed, 16 insertions, 2 deletions
diff --git a/src/cpu/o3/store_set.hh b/src/cpu/o3/store_set.hh
index ce4591f68..973b83b42 100644
--- a/src/cpu/o3/store_set.hh
+++ b/src/cpu/o3/store_set.hh
@@ -63,18 +63,24 @@ class StoreSet
StoreSet() { };
/** Creates store set predictor with given table sizes. */
- StoreSet(int SSIT_size, int LFST_size);
+ StoreSet(uint64_t clear_period, int SSIT_size, int LFST_size);
/** Default destructor. */
~StoreSet();
/** Initializes the store set predictor with the given table sizes. */
- void init(int SSIT_size, int LFST_size);
+ void init(uint64_t clear_period, int SSIT_size, int LFST_size);
/** Records a memory ordering violation between the younger load
* and the older store. */
void violation(Addr store_PC, Addr load_PC);
+ /** Clears the store set predictor every so often so that all the
+ * entries aren't used and stores are constantly predicted as
+ * conflicting.
+ */
+ void checkClear();
+
/** Inserts a load into the store set predictor. This does nothing but
* is included in case other predictors require a similar function.
*/
@@ -130,6 +136,11 @@ class StoreSet
typedef std::map<InstSeqNum, int, ltseqnum>::iterator SeqNumMapIt;
+ /** Number of loads/stores to process before wiping predictor so all
+ * entries don't get saturated
+ */
+ uint64_t clearPeriod;
+
/** Store Set ID Table size, in entries. */
int SSITSize;
@@ -141,6 +152,9 @@ class StoreSet
// HACK: Hardcoded for now.
int offsetBits;
+
+ /** Number of memory operations predicted since last clear of predictor */
+ int memOpsPred;
};
#endif // __CPU_O3_STORE_SET_HH__