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authorGeoffrey Blake <geoffrey.blake@arm.com>2012-03-09 09:59:27 -0500
committerGeoffrey Blake <geoffrey.blake@arm.com>2012-03-09 09:59:27 -0500
commit043709fdfab3b6c46f6ef95d1f642cd3c06ee20a (patch)
treeef8bab03f4260b67b57b00844d0245ca1e849ea0 /src/cpu/o3/thread_context.hh
parentdf05ffab1289b26aab2a0eb71ee55dcb7f42e5e9 (diff)
downloadgem5-043709fdfab3b6c46f6ef95d1f642cd3c06ee20a.tar.xz
CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
Enables the CheckerCPU to be selected at runtime with the --checker option from the configs/example/fs.py and configs/example/se.py configuration files. Also merges with the SE/FS changes.
Diffstat (limited to 'src/cpu/o3/thread_context.hh')
-rwxr-xr-xsrc/cpu/o3/thread_context.hh7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 8c32d1c05..ae76176ce 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -44,7 +44,6 @@
#define __CPU_O3_THREAD_CONTEXT_HH__
#include "config/the_isa.hh"
-#include "config/use_checker.hh"
#include "cpu/o3/isa_specific.hh"
#include "cpu/thread_context.hh"
@@ -84,9 +83,7 @@ class O3ThreadContext : public ThreadContext
/** Returns a pointer to the DTB. */
TheISA::TLB *getDTBPtr() { return cpu->dtb; }
-#if USE_CHECKER
- BaseCPU *getCheckerCpuPtr() { return NULL; }
-#endif
+ CheckerCPU *getCheckerCpuPtr() { return NULL; }
Decoder *getDecoderPtr() { return &cpu->fetch.decoder; }
@@ -194,9 +191,7 @@ class O3ThreadContext : public ThreadContext
/** Sets this thread's PC state. */
virtual void pcState(const TheISA::PCState &val);
-#if USE_CHECKER
virtual void pcStateNoRecord(const TheISA::PCState &val);
-#endif
/** Reads this thread's PC. */
virtual Addr instAddr()