alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate

activate(), suspend(), and halt() used on thread contexts had an optional
delay parameter. However this parameter was often ignored. Also, when used,
the delay was seemily arbitrarily set to 0 or 1 cycle (no other delays were
ever specified). This patch removes the delay parameter and 'Events'
associated with them across all ISAs and cores. Unused activate logic
is also removed.

1 files changed, 4 insertions, 5 deletions

diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index a00d2ffa3..b27fbb386 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -136,15 +136,14 @@ class O3ThreadContext : public ThreadContext
     virtual void setStatus(Status new_status)
     { thread->setStatus(new_status); }
 
-    /** Set the status to Active.  Optional delay indicates number of
-     * cycles to wait before beginning execution. */
-    virtual void activate(Cycles delay = Cycles(1));
+    /** Set the status to Active. */
+    virtual void activate();
 
     /** Set the status to Suspended. */
-    virtual void suspend(Cycles delay = Cycles(0));
+    virtual void suspend();
 
     /** Set the status to Halted. */
-    virtual void halt(Cycles delay = Cycles(0));
+    virtual void halt();
 
     /** Dumps the function profiling information.
      * @todo: Implement.