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author | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:44 -0500 |
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committer | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:44 -0500 |
commit | e2dad8236a95b5d7b1c1470385d0b543d3c7af4a (patch) | |
tree | 5b10bce38b63a506733c0d219a8abecce1eb013d /src/cpu/o3/thread_context.hh | |
parent | 17b47d35e1d0dedca7a3336f1193b1a502bcd78b (diff) | |
download | gem5-e2dad8236a95b5d7b1c1470385d0b543d3c7af4a.tar.xz |
cpu: Implement a flat register interface in thread contexts
Some architectures map registers differently depending on their mode
of operations. There is currently no architecture independent way of
accessing all registers. This patch introduces a flat register
interface to the ThreadContext class. This interface is useful, for
example, when serializing or copying thread contexts.
Diffstat (limited to 'src/cpu/o3/thread_context.hh')
-rwxr-xr-x | src/cpu/o3/thread_context.hh | 34 |
1 files changed, 27 insertions, 7 deletions
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index c6fa178b5..1efcfff9c 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 ARM Limited + * Copyright (c) 2011-2012 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -175,18 +175,30 @@ class O3ThreadContext : public ThreadContext virtual void clearArchRegs(); /** Reads an integer register. */ - virtual uint64_t readIntReg(int reg_idx); + virtual uint64_t readIntReg(int reg_idx) { + return readIntRegFlat(flattenIntIndex(reg_idx)); + } - virtual FloatReg readFloatReg(int reg_idx); + virtual FloatReg readFloatReg(int reg_idx) { + return readFloatRegFlat(flattenFloatIndex(reg_idx)); + } - virtual FloatRegBits readFloatRegBits(int reg_idx); + virtual FloatRegBits readFloatRegBits(int reg_idx) { + return readFloatRegBitsFlat(flattenFloatIndex(reg_idx)); + } /** Sets an integer register to a value. */ - virtual void setIntReg(int reg_idx, uint64_t val); + virtual void setIntReg(int reg_idx, uint64_t val) { + setIntRegFlat(flattenIntIndex(reg_idx), val); + } - virtual void setFloatReg(int reg_idx, FloatReg val); + virtual void setFloatReg(int reg_idx, FloatReg val) { + setFloatRegFlat(flattenFloatIndex(reg_idx), val); + } - virtual void setFloatRegBits(int reg_idx, FloatRegBits val); + virtual void setFloatRegBits(int reg_idx, FloatRegBits val) { + setFloatRegBitsFlat(flattenFloatIndex(reg_idx), val); + } /** Reads this thread's PC state. */ virtual TheISA::PCState pcState() @@ -268,6 +280,14 @@ class O3ThreadContext : public ThreadContext cpu->squashFromTC(thread->threadId()); } + virtual uint64_t readIntRegFlat(int idx); + virtual void setIntRegFlat(int idx, uint64_t val); + + virtual FloatReg readFloatRegFlat(int idx); + virtual void setFloatRegFlat(int idx, FloatReg val); + + virtual FloatRegBits readFloatRegBitsFlat(int idx); + virtual void setFloatRegBitsFlat(int idx, FloatRegBits val); }; #endif |