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author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-31 22:40:08 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-31 22:40:08 -0800 |
commit | ea8b347dc5d375572d8d19770024ec8be5fd5017 (patch) | |
tree | 56bb75b1f071a749b7e90218d0d6b0e9265657bb /src/cpu/o3/thread_context.hh | |
parent | e88165a431a90cf7e33e205794caed898ca6fcb1 (diff) | |
parent | 7d4f18770073d968c70cd3ffcdd117f50a6056a2 (diff) | |
download | gem5-ea8b347dc5d375572d8d19770024ec8be5fd5017.tar.xz |
Merge with head, hopefully the last time for this batch.
Diffstat (limited to 'src/cpu/o3/thread_context.hh')
-rwxr-xr-x | src/cpu/o3/thread_context.hh | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index ffe828c94..c2096fab2 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2011 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2004-2006 The Regents of The University of Michigan * All rights reserved. * @@ -32,6 +44,7 @@ #define __CPU_O3_THREAD_CONTEXT_HH__ #include "config/the_isa.hh" +#include "config/use_checker.hh" #include "cpu/o3/isa_specific.hh" #include "cpu/thread_context.hh" @@ -71,6 +84,10 @@ class O3ThreadContext : public ThreadContext /** Returns a pointer to the DTB. */ TheISA::TLB *getDTBPtr() { return cpu->dtb; } +#if USE_CHECKER + BaseCPU *getCheckerCpuPtr() { return NULL; } +#endif + Decoder *getDecoderPtr() { return &cpu->fetch.decoder; } /** Returns a pointer to this CPU. */ @@ -177,6 +194,10 @@ class O3ThreadContext : public ThreadContext /** Sets this thread's PC state. */ virtual void pcState(const TheISA::PCState &val); +#if USE_CHECKER + virtual void pcStateNoRecord(const TheISA::PCState &val); +#endif + /** Reads this thread's PC. */ virtual Addr instAddr() { return cpu->instAddr(thread->threadId()); } |