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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-07-28 01:58:04 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-07-28 01:58:04 -0500 |
| commit | aafa5c3f86ea54f5e6e88009be656aeec12eef5f (patch) | |
| tree | d40f2fd8a807ddc9638f292205754f9ecf19b6ef /src/cpu/o3/thread_context.hh | |
| parent | 608641e23c7f2288810c3f23a1a63790b664f2ab (diff) | |
| download | gem5-aafa5c3f86ea54f5e6e88009be656aeec12eef5f.tar.xz | |
revert 5af8f40d8f2c
Diffstat (limited to 'src/cpu/o3/thread_context.hh')
| -rwxr-xr-x | src/cpu/o3/thread_context.hh | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index 6e9b054da..87d87900c 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -189,10 +189,6 @@ class O3ThreadContext : public ThreadContext return readCCRegFlat(flattenCCIndex(reg_idx)); } - virtual const VectorReg &readVectorReg(int reg_idx) { - return readVectorRegFlat(flattenVectorIndex(reg_idx)); - } - /** Sets an integer register to a value. */ virtual void setIntReg(int reg_idx, uint64_t val) { setIntRegFlat(flattenIntIndex(reg_idx), val); @@ -210,10 +206,6 @@ class O3ThreadContext : public ThreadContext setCCRegFlat(flattenCCIndex(reg_idx), val); } - virtual void setVectorReg(int reg_idx, const VectorReg &val) { - setVectorRegFlat(flattenVectorIndex(reg_idx), val); - } - /** Reads this thread's PC state. */ virtual TheISA::PCState pcState() { return cpu->pcState(thread->threadId()); } @@ -254,7 +246,6 @@ class O3ThreadContext : public ThreadContext virtual int flattenIntIndex(int reg); virtual int flattenFloatIndex(int reg); virtual int flattenCCIndex(int reg); - virtual int flattenVectorIndex(int reg); virtual int flattenMiscIndex(int reg); /** Returns the number of consecutive store conditional failures. */ @@ -300,9 +291,6 @@ class O3ThreadContext : public ThreadContext virtual CCReg readCCRegFlat(int idx); virtual void setCCRegFlat(int idx, CCReg val); - - virtual const VectorReg &readVectorRegFlat(int idx); - virtual void setVectorRegFlat(int idx, const VectorReg &val); }; #endif |