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| author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-31 22:40:08 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-31 22:40:08 -0800 |
| commit | ea8b347dc5d375572d8d19770024ec8be5fd5017 (patch) | |
| tree | 56bb75b1f071a749b7e90218d0d6b0e9265657bb /src/cpu/o3/thread_context_impl.hh | |
| parent | e88165a431a90cf7e33e205794caed898ca6fcb1 (diff) | |
| parent | 7d4f18770073d968c70cd3ffcdd117f50a6056a2 (diff) | |
| download | gem5-ea8b347dc5d375572d8d19770024ec8be5fd5017.tar.xz | |
Merge with head, hopefully the last time for this batch.
Diffstat (limited to 'src/cpu/o3/thread_context_impl.hh')
| -rwxr-xr-x | src/cpu/o3/thread_context_impl.hh | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index 5ba454458..2ea39f3eb 100755 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010 ARM Limited + * Copyright (c) 2010-2011 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -44,6 +44,7 @@ #include "arch/kernel_stats.hh" #include "arch/registers.hh" #include "config/the_isa.hh" +#include "config/use_checker.hh" #include "cpu/o3/thread_context.hh" #include "cpu/quiesce_event.hh" #include "debug/O3CPU.hh" @@ -296,6 +297,20 @@ O3ThreadContext<Impl>::pcState(const TheISA::PCState &val) } } +#if USE_CHECKER +template <class Impl> +void +O3ThreadContext<Impl>::pcStateNoRecord(const TheISA::PCState &val) +{ + cpu->pcState(val, thread->threadId()); + + // Squash if we're not already in a state update mode. + if (!thread->trapPending && !thread->inSyscall) { + cpu->squashFromTC(thread->threadId()); + } +} +#endif + template <class Impl> int O3ThreadContext<Impl>::flattenIntIndex(int reg) |