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authorAndreas Hansson <andreas.hansson@arm.com>2012-08-28 14:30:33 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-08-28 14:30:33 -0400
commit0cacf7e8178defce4063b7cfc8a592c595f56fa2 (patch)
treeac2a57952c3d8b87b1a2d0190d26ab149c12f65e /src/cpu/o3
parentd53d04473e0d6ca1765f1117072eec59187a7f7b (diff)
downloadgem5-0cacf7e8178defce4063b7cfc8a592c595f56fa2.tar.xz
Clock: Add a Cycles wrapper class and use where applicable
This patch addresses the comments and feedback on the preceding patch that reworks the clocks and now more clearly shows where cycles (relative cycle counts) are used to express time. Instead of bumping the existing patch I chose to make this a separate patch, merely to try and focus the discussion around a smaller set of changes. The two patches will be pushed together though. This changes done as part of this patch are mostly following directly from the introduction of the wrapper class, and change enough code to make things compile and run again. There are definitely more places where int/uint/Tick is still used to represent cycles, and it will take some time to chase them all down. Similarly, a lot of parameters should be changed from Param.Tick and Param.Unsigned to Param.Cycles. In addition, the use of curTick is questionable as there should not be an absolute cycle. Potential solutions can be built on top of this patch. There is a similar situation in the o3 CPU where lastRunningCycle is currently counting in Cycles, and is still an absolute time. More discussion to be had in other words. An additional change that would be appropriate in the future is to perform a similar wrapping of Tick and probably also introduce a Ticks class along with suitable operators for all these classes.
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/commit.hh2
-rw-r--r--src/cpu/o3/cpu.cc27
-rw-r--r--src/cpu/o3/cpu.hh13
-rw-r--r--src/cpu/o3/fetch_impl.hh3
-rw-r--r--src/cpu/o3/inst_queue_impl.hh3
-rw-r--r--src/cpu/o3/lsq_unit.hh4
-rwxr-xr-xsrc/cpu/o3/thread_context.hh6
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh6
8 files changed, 34 insertions, 30 deletions
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 1119e8b50..d30097553 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -409,7 +409,7 @@ class DefaultCommit
/** The latency to handle a trap. Used when scheduling trap
* squash event.
*/
- uint trapLatency;
+ Cycles trapLatency;
/** The interrupt fault. */
Fault interrupt;
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 95683a77a..fdd45fdda 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -256,7 +256,8 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
globalSeqNum(1),
system(params->system),
drainCount(0),
- deferRegistration(params->defer_registration)
+ deferRegistration(params->defer_registration),
+ lastRunningCycle(curCycle())
{
if (!deferRegistration) {
_status = Running;
@@ -386,8 +387,6 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
// Setup the ROB for whichever stages need it.
commit.setROB(&rob);
- lastRunningCycle = curCycle();
-
lastActivatedCycle = 0;
#if 0
// Give renameMap & rename stage access to the freeList;
@@ -629,7 +628,7 @@ FullO3CPU<Impl>::tick()
lastRunningCycle = curCycle();
timesIdled++;
} else {
- schedule(tickEvent, clockEdge(1));
+ schedule(tickEvent, clockEdge(Cycles(1)));
DPRINTF(O3CPU, "Scheduling next tick!\n");
}
}
@@ -741,12 +740,12 @@ FullO3CPU<Impl>::totalOps() const
template <class Impl>
void
-FullO3CPU<Impl>::activateContext(ThreadID tid, int delay)
+FullO3CPU<Impl>::activateContext(ThreadID tid, Cycles delay)
{
// Needs to set each stage to running as well.
if (delay){
DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate "
- "on cycle %d\n", tid, curTick() + ticks(delay));
+ "on cycle %d\n", tid, clockEdge(delay));
scheduleActivateThreadEvent(tid, delay);
} else {
activateThread(tid);
@@ -762,7 +761,8 @@ FullO3CPU<Impl>::activateContext(ThreadID tid, int delay)
activityRec.activity();
fetch.wakeFromQuiesce();
- Tick cycles = curCycle() - lastRunningCycle;
+ Cycles cycles(curCycle() - lastRunningCycle);
+ // @todo: This is an oddity that is only here to match the stats
if (cycles != 0)
--cycles;
quiesceCycles += cycles;
@@ -776,12 +776,12 @@ FullO3CPU<Impl>::activateContext(ThreadID tid, int delay)
template <class Impl>
bool
FullO3CPU<Impl>::scheduleDeallocateContext(ThreadID tid, bool remove,
- int delay)
+ Cycles delay)
{
// Schedule removal of thread data from CPU
if (delay){
DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to deallocate "
- "on cycle %d\n", tid, curTick() + ticks(delay));
+ "on tick %d\n", tid, clockEdge(delay));
scheduleDeallocateContextEvent(tid, remove, delay);
return false;
} else {
@@ -797,7 +797,7 @@ void
FullO3CPU<Impl>::suspendContext(ThreadID tid)
{
DPRINTF(O3CPU,"[tid: %i]: Suspending Thread Context.\n", tid);
- bool deallocated = scheduleDeallocateContext(tid, false, 1);
+ bool deallocated = scheduleDeallocateContext(tid, false, Cycles(1));
// If this was the last thread then unschedule the tick event.
if ((activeThreads.size() == 1 && !deallocated) ||
activeThreads.size() == 0)
@@ -814,7 +814,7 @@ FullO3CPU<Impl>::haltContext(ThreadID tid)
{
//For now, this is the same as deallocate
DPRINTF(O3CPU,"[tid:%i]: Halt Context called. Deallocating", tid);
- scheduleDeallocateContext(tid, true, 1);
+ scheduleDeallocateContext(tid, true, Cycles(1));
}
template <class Impl>
@@ -854,7 +854,7 @@ FullO3CPU<Impl>::insertThread(ThreadID tid)
src_tc->setStatus(ThreadContext::Active);
- activateContext(tid,1);
+ activateContext(tid, Cycles(1));
//Reset ROB/IQ/LSQ Entries
commit.rob->resetEntries();
@@ -1672,7 +1672,8 @@ FullO3CPU<Impl>::wakeCPU()
DPRINTF(Activity, "Waking up CPU\n");
- Tick cycles = curCycle() - lastRunningCycle;
+ Cycles cycles(curCycle() - lastRunningCycle);
+ // @todo: This is an oddity that is only here to match the stats
if (cycles != 0)
--cycles;
idleCycles += cycles;
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 5910f314d..076cce0fb 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -211,7 +211,7 @@ class FullO3CPU : public BaseO3CPU
TickEvent tickEvent;
/** Schedule tick event, regardless of its current state. */
- void scheduleTickEvent(int delay)
+ void scheduleTickEvent(Cycles delay)
{
if (tickEvent.squashed())
reschedule(tickEvent, clockEdge(delay));
@@ -251,7 +251,7 @@ class FullO3CPU : public BaseO3CPU
/** Schedule thread to activate , regardless of its current state. */
void
- scheduleActivateThreadEvent(ThreadID tid, int delay)
+ scheduleActivateThreadEvent(ThreadID tid, Cycles delay)
{
// Schedule thread to activate, regardless of its current state.
if (activateThreadEvent[tid].squashed())
@@ -314,7 +314,7 @@ class FullO3CPU : public BaseO3CPU
/** Schedule cpu to deallocate thread context.*/
void
- scheduleDeallocateContextEvent(ThreadID tid, bool remove, int delay)
+ scheduleDeallocateContextEvent(ThreadID tid, bool remove, Cycles delay)
{
// Schedule thread to activate, regardless of its current state.
if (deallocateContextEvent[tid].squashed())
@@ -392,7 +392,7 @@ class FullO3CPU : public BaseO3CPU
virtual Counter totalOps() const;
/** Add Thread to Active Threads List. */
- void activateContext(ThreadID tid, int delay);
+ void activateContext(ThreadID tid, Cycles delay);
/** Remove Thread from Active Threads List */
void suspendContext(ThreadID tid);
@@ -400,7 +400,8 @@ class FullO3CPU : public BaseO3CPU
/** Remove Thread from Active Threads List &&
* Possibly Remove Thread Context from CPU.
*/
- bool scheduleDeallocateContext(ThreadID tid, bool remove, int delay = 1);
+ bool scheduleDeallocateContext(ThreadID tid, bool remove,
+ Cycles delay = Cycles(1));
/** Remove Thread from Active Threads List &&
* Remove Thread Context from CPU.
@@ -748,7 +749,7 @@ class FullO3CPU : public BaseO3CPU
std::list<int> cpuWaitList;
/** The cycle that the CPU was last running, used for statistics. */
- Tick lastRunningCycle;
+ Cycles lastRunningCycle;
/** The cycle that the CPU was last activated by a new thread*/
Tick lastActivatedCycle;
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 9caf0c79b..33563f539 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -646,7 +646,8 @@ DefaultFetch<Impl>::finishTranslation(Fault fault, RequestPtr mem_req)
assert(!finishTranslationEvent.scheduled());
finishTranslationEvent.setFault(fault);
finishTranslationEvent.setReq(mem_req);
- cpu->schedule(finishTranslationEvent, cpu->clockEdge(1));
+ cpu->schedule(finishTranslationEvent,
+ cpu->clockEdge(Cycles(1)));
return;
}
DPRINTF(Fetch, "[tid:%i] Got back req with addr %#x but expected %#x\n",
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index b6c3bd239..a8f14287a 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -828,7 +828,8 @@ InstructionQueue<Impl>::scheduleReadyInsts()
FUCompletion *execution = new FUCompletion(issuing_inst,
idx, this);
- cpu->schedule(execution, cpu->clockEdge(op_latency - 1));
+ cpu->schedule(execution,
+ cpu->clockEdge(Cycles(op_latency - 1)));
// @todo: Enforce that issue_latency == 1 or op_latency
if (issue_latency > 1) {
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index c567341c7..8eb33c297 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -607,7 +607,7 @@ LSQUnit<Impl>::read(Request *req, Request *sreqLow, Request *sreqHigh,
load_inst->memData = new uint8_t[64];
ThreadContext *thread = cpu->tcBase(lsqID);
- Tick delay;
+ Cycles delay(0);
PacketPtr data_pkt = new Packet(req, MemCmd::ReadReq);
if (!TheISA::HasUnalignedMemAcc || !sreqLow) {
@@ -622,7 +622,7 @@ LSQUnit<Impl>::read(Request *req, Request *sreqLow, Request *sreqHigh,
snd_data_pkt->dataStatic(load_inst->memData + sreqLow->getSize());
delay = TheISA::handleIprRead(thread, fst_data_pkt);
- unsigned delay2 = TheISA::handleIprRead(thread, snd_data_pkt);
+ Cycles delay2 = TheISA::handleIprRead(thread, snd_data_pkt);
if (delay2 > delay)
delay = delay2;
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 5c236ee0c..520f07b0f 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -134,13 +134,13 @@ class O3ThreadContext : public ThreadContext
/** Set the status to Active. Optional delay indicates number of
* cycles to wait before beginning execution. */
- virtual void activate(int delay = 1);
+ virtual void activate(Cycles delay = Cycles(1));
/** Set the status to Suspended. */
- virtual void suspend(int delay = 0);
+ virtual void suspend(Cycles delay = Cycles(0));
/** Set the status to Halted. */
- virtual void halt(int delay = 0);
+ virtual void halt(Cycles delay = Cycles(0));
/** Dumps the function profiling information.
* @todo: Implement.
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index 13bfe32df..8a8ee636a 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -102,7 +102,7 @@ O3ThreadContext<Impl>::takeOverFrom(ThreadContext *old_context)
template <class Impl>
void
-O3ThreadContext<Impl>::activate(int delay)
+O3ThreadContext<Impl>::activate(Cycles delay)
{
DPRINTF(O3CPU, "Calling activate on Thread Context %d\n",
threadId());
@@ -119,7 +119,7 @@ O3ThreadContext<Impl>::activate(int delay)
template <class Impl>
void
-O3ThreadContext<Impl>::suspend(int delay)
+O3ThreadContext<Impl>::suspend(Cycles delay)
{
DPRINTF(O3CPU, "Calling suspend on Thread Context %d\n",
threadId());
@@ -136,7 +136,7 @@ O3ThreadContext<Impl>::suspend(int delay)
template <class Impl>
void
-O3ThreadContext<Impl>::halt(int delay)
+O3ThreadContext<Impl>::halt(Cycles delay)
{
DPRINTF(O3CPU, "Calling halt on Thread Context %d\n",
threadId());