diff options
author | Korey Sewell <ksewell@umich.edu> | 2007-11-15 20:35:49 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2007-11-15 20:35:49 -0500 |
commit | d09ab2bd225527b8204168b5763796946bde76b8 (patch) | |
tree | c487bb1854f03628164dbee2f826a276ef21a8d6 /src/cpu/o3 | |
parent | 7c076479e410767517d64c5d76f0991fad9d7e4d (diff) | |
download | gem5-d09ab2bd225527b8204168b5763796946bde76b8.tar.xz |
add thread id to misc. reg functions
--HG--
extra : convert_revision : 35d073d1279947d943a0290832e09a5268dd0b76
Diffstat (limited to 'src/cpu/o3')
-rwxr-xr-x | src/cpu/o3/mips/dyn_inst.hh | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/o3/mips/dyn_inst.hh b/src/cpu/o3/mips/dyn_inst.hh index 7cd53413b..b1a29ccf9 100755 --- a/src/cpu/o3/mips/dyn_inst.hh +++ b/src/cpu/o3/mips/dyn_inst.hh @@ -99,7 +99,8 @@ class MipsDynInst : public BaseDynInst<Impl> public: /** Reads a miscellaneous register. */ - MiscReg readMiscRegNoEffect(int misc_reg) + /** TODO: Use thread number from argument if given, will probably not work for MIPS MT as is */ + MiscReg readMiscRegNoEffect(int misc_reg, unsigned tid = 0) { return this->cpu->readMiscRegNoEffect(misc_reg, this->threadNumber); } @@ -113,7 +114,7 @@ class MipsDynInst : public BaseDynInst<Impl> } /** Sets a misc. register. */ - void setMiscRegNoEffect(int misc_reg, const MiscReg &val) + void setMiscRegNoEffect(int misc_reg, const MiscReg &val, unsigned tid = 0) { this->instResult.integer = val; this->cpu->setMiscRegNoEffect(misc_reg, val, this->threadNumber); |