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author | Dam Sunwoo <dam.sunwoo@arm.com> | 2013-04-22 13:20:31 -0400 |
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committer | Dam Sunwoo <dam.sunwoo@arm.com> | 2013-04-22 13:20:31 -0400 |
commit | e8381142b061fbdf2f22d958f1c7559e9ffb3bd8 (patch) | |
tree | 452e96de7f6322d62f325992a9ce5d1d2a3c3bbb /src/cpu/o3 | |
parent | 2c1e34431326381833de289b1d90f2427ba16c98 (diff) | |
download | gem5-e8381142b061fbdf2f22d958f1c7559e9ffb3bd8.tar.xz |
sim: separate nextCycle() and clockEdge() in clockedObjects
Previously, nextCycle() could return the *current* cycle if the current tick was
already aligned with the clock edge. This behavior is not only confusing (not
quite what the function name implies), but also caused problems in the
drainResume() function. When exiting/re-entering the sim loop (e.g., to take
checkpoints), the CPUs will drain and resume. Due to the previous behavior of
nextCycle(), the CPU tick events were being rescheduled in the same ticks that
were already processed before draining. This caused divergence from runs that
did not exit/re-entered the sim loop. (Initially a cycle difference, but a
significant impact later on.)
This patch separates out the two behaviors (nextCycle() and clockEdge()),
uses nextCycle() in drainResume, and uses clockEdge() everywhere else.
Nothing (other than name) should change except for the drainResume timing.
Diffstat (limited to 'src/cpu/o3')
-rw-r--r-- | src/cpu/o3/cpu.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 9caa49ad6..99beaa176 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -1720,7 +1720,7 @@ FullO3CPU<Impl>::wakeCPU() idleCycles += cycles; numCycles += cycles; - schedule(tickEvent, nextCycle()); + schedule(tickEvent, clockEdge()); } template <class Impl> |