diff options
author | Ali Saidi <saidi@eecs.umich.edu> | 2007-09-28 13:21:52 -0400 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-09-28 13:21:52 -0400 |
commit | d325f49b70e52044fd1072afed27227ecd4b2a60 (patch) | |
tree | 9157db931a027b3fd5d14330701b7cbf19f58483 /src/cpu/o3 | |
parent | 887cd6a273f8777580fc3a046090c6b5244e9cad (diff) | |
download | gem5-d325f49b70e52044fd1072afed27227ecd4b2a60.tar.xz |
Rename cycles() function to ticks()
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
Diffstat (limited to 'src/cpu/o3')
-rw-r--r-- | src/cpu/o3/commit_impl.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/cpu.cc | 6 | ||||
-rw-r--r-- | src/cpu/o3/cpu.hh | 12 | ||||
-rw-r--r-- | src/cpu/o3/inst_queue_impl.hh | 2 |
4 files changed, 11 insertions, 11 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index f263383ae..e32dc7921 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -325,7 +325,7 @@ DefaultCommit<Impl>::initStage() cpu->activateStage(O3CPU::CommitIdx); cpu->activityThisCycle(); - trapLatency = cpu->cycles(trapLatency); + trapLatency = cpu->ticks(trapLatency); } template <class Impl> diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index b2b7e09c0..3842d27bd 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -464,7 +464,7 @@ FullO3CPU<Impl>::tick() lastRunningCycle = curTick; timesIdled++; } else { - tickEvent.schedule(nextCycle(curTick + cycles(1))); + tickEvent.schedule(nextCycle(curTick + ticks(1))); DPRINTF(O3CPU, "Scheduling next tick!\n"); } } @@ -558,7 +558,7 @@ FullO3CPU<Impl>::activateContext(int tid, int delay) // Needs to set each stage to running as well. if (delay){ DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate " - "on cycle %d\n", tid, curTick + cycles(delay)); + "on cycle %d\n", tid, curTick + ticks(delay)); scheduleActivateThreadEvent(tid, delay); } else { activateThread(tid); @@ -585,7 +585,7 @@ FullO3CPU<Impl>::deallocateContext(int tid, bool remove, int delay) // Schedule removal of thread data from CPU if (delay){ DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to deallocate " - "on cycle %d\n", tid, curTick + cycles(delay)); + "on cycle %d\n", tid, curTick + ticks(delay)); scheduleDeallocateContextEvent(tid, remove, delay); return false; } else { diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index d97a2080d..162e377e1 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -146,9 +146,9 @@ class FullO3CPU : public BaseO3CPU void scheduleTickEvent(int delay) { if (tickEvent.squashed()) - tickEvent.reschedule(nextCycle(curTick + cycles(delay))); + tickEvent.reschedule(nextCycle(curTick + ticks(delay))); else if (!tickEvent.scheduled()) - tickEvent.schedule(nextCycle(curTick + cycles(delay))); + tickEvent.schedule(nextCycle(curTick + ticks(delay))); } /** Unschedule tick event, regardless of its current state. */ @@ -187,10 +187,10 @@ class FullO3CPU : public BaseO3CPU // Schedule thread to activate, regardless of its current state. if (activateThreadEvent[tid].squashed()) activateThreadEvent[tid]. - reschedule(nextCycle(curTick + cycles(delay))); + reschedule(nextCycle(curTick + ticks(delay))); else if (!activateThreadEvent[tid].scheduled()) activateThreadEvent[tid]. - schedule(nextCycle(curTick + cycles(delay))); + schedule(nextCycle(curTick + ticks(delay))); } /** Unschedule actiavte thread event, regardless of its current state. */ @@ -238,10 +238,10 @@ class FullO3CPU : public BaseO3CPU // Schedule thread to activate, regardless of its current state. if (deallocateContextEvent[tid].squashed()) deallocateContextEvent[tid]. - reschedule(nextCycle(curTick + cycles(delay))); + reschedule(nextCycle(curTick + ticks(delay))); else if (!deallocateContextEvent[tid].scheduled()) deallocateContextEvent[tid]. - schedule(nextCycle(curTick + cycles(delay))); + schedule(nextCycle(curTick + ticks(delay))); } /** Unschedule thread deallocation in CPU */ diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index 47f019ebe..aea62f12d 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -752,7 +752,7 @@ InstructionQueue<Impl>::scheduleReadyInsts() FUCompletion *execution = new FUCompletion(issuing_inst, idx, this); - execution->schedule(curTick + cpu->cycles(issue_latency - 1)); + execution->schedule(curTick + cpu->ticks(issue_latency - 1)); // @todo: Enforce that issue_latency == 1 or op_latency if (issue_latency > 1) { |