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authorAli Saidi <saidi@eecs.umich.edu>2008-09-10 14:26:15 -0400
committerAli Saidi <saidi@eecs.umich.edu>2008-09-10 14:26:15 -0400
commit3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0 (patch)
treec9e147a14bcab9e4767ad13a00ac4a375044c441 /src/cpu/o3
parent09a8fb0b5263d4b41b8206ce075a3f6923907d65 (diff)
downloadgem5-3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0.tar.xz
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/alpha/dyn_inst.hh4
-rwxr-xr-xsrc/cpu/o3/mips/dyn_inst.hh4
-rw-r--r--src/cpu/o3/regfile.hh2
3 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/o3/alpha/dyn_inst.hh b/src/cpu/o3/alpha/dyn_inst.hh
index a6fb7b885..180545c3d 100644
--- a/src/cpu/o3/alpha/dyn_inst.hh
+++ b/src/cpu/o3/alpha/dyn_inst.hh
@@ -67,8 +67,8 @@ class AlphaDynInst : public BaseDynInst<Impl>
typedef TheISA::MiscReg MiscReg;
enum {
- MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
- MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
+ MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
+ MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
};
public:
diff --git a/src/cpu/o3/mips/dyn_inst.hh b/src/cpu/o3/mips/dyn_inst.hh
index b1a29ccf9..861577966 100755
--- a/src/cpu/o3/mips/dyn_inst.hh
+++ b/src/cpu/o3/mips/dyn_inst.hh
@@ -64,8 +64,8 @@ class MipsDynInst : public BaseDynInst<Impl>
typedef TheISA::MiscReg MiscReg;
enum {
- MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
- MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
+ MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
+ MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
};
public:
diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh
index 8bd867136..53ac2d683 100644
--- a/src/cpu/o3/regfile.hh
+++ b/src/cpu/o3/regfile.hh
@@ -265,7 +265,7 @@ class PhysRegFile
#if FULL_SYSTEM
private:
- int intrflag; // interrupt flag
+ int intrflag; // interrupt flag
#endif
private: