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authorKevin Lim <ktlim@umich.edu>2006-11-02 13:11:38 -0500
committerKevin Lim <ktlim@umich.edu>2006-11-02 13:11:38 -0500
commitccaf80cc46fb86639ab5ee166baca08277f5450f (patch)
treeca8ebf28f3092a5f5d06748b31a8dda66d106ee3 /src/cpu/o3
parentf763864786d7b95d46fba6f37e1e9ed601b60733 (diff)
downloadgem5-ccaf80cc46fb86639ab5ee166baca08277f5450f.tar.xz
Use ISA specific makeExtMI.
src/arch/alpha/utility.hh: For now makeExtMI will be specific to the ISA. --HG-- extra : convert_revision : 89959c6499efcc3df9301ad8ea039580764a1496
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/fetch_impl.hh6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 2b152e376..31f3b96d6 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1117,7 +1117,11 @@ DefaultFetch<Impl>::fetch(bool &status_change)
inst = TheISA::gtoh(*reinterpret_cast<TheISA::MachInst *>
(&cacheData[tid][offset]));
- ext_inst = TheISA::makeExtMI(inst, cpu->tcBase(tid));
+#if THE_ISA == ALPHA_ISA
+ ext_inst = TheISA::makeExtMI(inst, fetch_PC);
+#elif THE_ISA == SPARC_ISA
+ ext_inst = TheISA::makeExtMI(inst, cpu->thread[tid]->getTC());
+#endif
// Create a new DynInst from the instruction fetched.
DynInstPtr instruction = new DynInst(ext_inst, fetch_PC,