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authorMitch Hayenga <mitch.hayenga@arm.com>2016-02-29 19:13:13 -0600
committerMitch Hayenga <mitch.hayenga@arm.com>2016-02-29 19:13:13 -0600
commitc0d19391d423d16c5dc587c4946e8395b9c0db91 (patch)
tree0f232ea2582d733467413ed590d3ec53c53f22d2 /src/cpu/o3
parentaa674268e97810c50110d0418e13d6ec96217689 (diff)
downloadgem5-c0d19391d423d16c5dc587c4946e8395b9c0db91.tar.xz
arm: Squash after returning from exceptions in v7
Properly done for the ERET instruction in v8, but not for v7. Many control register changes are only visible after explicit instruction synchronization barriers or exception entry/exit. This means mode changing instructions should squash any younger in-flight speculative instructions.
Diffstat (limited to 'src/cpu/o3')
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