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authorGabe Black <gblack@eecs.umich.edu>2006-12-28 14:27:45 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-12-28 14:27:45 -0500
commitb642ad00eb55678f4ce20fdf127a00a6c0bbdcb8 (patch)
tree37280a2bade801cc43d66702b537cfa0c51ba91b /src/cpu/o3
parent9ca6efdb60866b1feada0295b02fdc7ff49eacf2 (diff)
downloadgem5-b642ad00eb55678f4ce20fdf127a00a6c0bbdcb8.tar.xz
Implement a stub nnpc for alpha that is read only as npc+4.
--HG-- extra : convert_revision : d08b740d32757fa5471c9bcde9084d59a1d8102d
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/alpha/thread_context.hh3
-rw-r--r--src/cpu/o3/cpu.cc2
2 files changed, 1 insertions, 4 deletions
diff --git a/src/cpu/o3/alpha/thread_context.hh b/src/cpu/o3/alpha/thread_context.hh
index e4a6735c2..6d61501ac 100644
--- a/src/cpu/o3/alpha/thread_context.hh
+++ b/src/cpu/o3/alpha/thread_context.hh
@@ -45,8 +45,7 @@ class AlphaTC : public O3ThreadContext<Impl>
virtual uint64_t readNextNPC()
{
- panic("Alpha has no NextNPC!");
- return 0;
+ return this->readNextPC() + sizeof(TheISA::MachInst);
}
virtual void setNextNPC(uint64_t val)
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 5616ba398..7c8970299 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -659,9 +659,7 @@ FullO3CPU<Impl>::insertThread(unsigned tid)
//Set PC/NPC/NNPC
setPC(src_tc->readPC(), tid);
setNextPC(src_tc->readNextPC(), tid);
-#if ISA_HAS_DELAY_SLOT
setNextNPC(src_tc->readNextNPC(), tid);
-#endif
src_tc->setStatus(ThreadContext::Active);