misc: Remove redundant compiler-specific defines

This patch moves away from using M5_ATTR_OVERRIDE and the m5::hashmap
(and similar) abstractions, as these are no longer needed with gcc 4.7
and clang 3.1 as minimum compiler versions.

4 files changed, 9 insertions, 11 deletions

diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index bd9c44752..bed61234a 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -338,9 +338,8 @@ class FullO3CPU : public BaseO3CPU
     /** Is the CPU draining? */
     bool isDraining() const { return drainState() == DrainState::Draining; }
 
-    void serializeThread(CheckpointOut &cp,
-                         ThreadID tid) const M5_ATTR_OVERRIDE;
-    void unserializeThread(CheckpointIn &cp, ThreadID tid) M5_ATTR_OVERRIDE;
+    void serializeThread(CheckpointOut &cp, ThreadID tid) const override;
+    void unserializeThread(CheckpointIn &cp, ThreadID tid) override;
 
   public:
     /** Executes a syscall.
@@ -350,10 +349,10 @@ class FullO3CPU : public BaseO3CPU
 
     /** Starts draining the CPU's pipeline of all instructions in
      * order to stop all memory accesses. */
-    DrainState drain() M5_ATTR_OVERRIDE;
+    DrainState drain() override;
 
     /** Resumes execution after a drain. */
-    void drainResume() M5_ATTR_OVERRIDE;
+    void drainResume() override;
 
     /**
      * Commit has reached a safe point to drain a thread.
@@ -640,7 +639,7 @@ class FullO3CPU : public BaseO3CPU
     /** Wakes the CPU, rescheduling the CPU if it's not already active. */
     void wakeCPU();
 
-    virtual void wakeup(ThreadID tid) M5_ATTR_OVERRIDE;
+    virtual void wakeup(ThreadID tid) override;
 
     /** Gets a free thread id. Use if thread ids change across system. */
     ThreadID getFreeTid();
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index e356dd442..039bba8b6 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -54,7 +54,6 @@
 #include "arch/isa_traits.hh"
 #include "arch/locked_mem.hh"
 #include "arch/mmapped_ipr.hh"
-#include "base/hashmap.hh"
 #include "config/the_isa.hh"
 #include "cpu/inst_seq.hh"
 #include "cpu/timebuf.hh"
diff --git a/src/cpu/o3/mem_dep_unit.hh b/src/cpu/o3/mem_dep_unit.hh
index c2c411fe4..ffe66be6b 100644
--- a/src/cpu/o3/mem_dep_unit.hh
+++ b/src/cpu/o3/mem_dep_unit.hh
@@ -46,8 +46,8 @@
 #include <list>
 #include <memory>
 #include <set>
+#include <unordered_map>
 
-#include "base/hashmap.hh"
 #include "base/statistics.hh"
 #include "cpu/inst_seq.hh"
 #include "debug/MemDepUnit.hh"
@@ -237,7 +237,7 @@ class MemDepUnit
     /** Moves an entry to the ready list. */
     inline void moveToReady(MemDepEntryPtr &ready_inst_entry);
 
-    typedef m5::hash_map<InstSeqNum, MemDepEntryPtr, SNHash> MemDepHash;
+    typedef std::unordered_map<InstSeqNum, MemDepEntryPtr, SNHash> MemDepHash;
 
     typedef typename MemDepHash::iterator MemDepHashIt;
 
diff --git a/src/cpu/o3/thread_state.hh b/src/cpu/o3/thread_state.hh
index cf9403e48..19235c44c 100644
--- a/src/cpu/o3/thread_state.hh
+++ b/src/cpu/o3/thread_state.hh
@@ -112,7 +112,7 @@ struct O3ThreadState : public ThreadState {
         profilePC = 3;
     }
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
+    void serialize(CheckpointOut &cp) const override
     {
         ThreadState::serialize(cp);
         // Use the ThreadContext serialization helper to serialize the
@@ -120,7 +120,7 @@ struct O3ThreadState : public ThreadState {
         ::serialize(*tc, cp);
     }
 
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
+    void unserialize(CheckpointIn &cp) override
     {
         // Prevent squashing - we don't have any instructions in
         // flight that we need to squash since we just instantiated a