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authorNathan Binkert <nate@binkert.org>2008-10-21 07:12:53 -0700
committerNathan Binkert <nate@binkert.org>2008-10-21 07:12:53 -0700
commit9836d81c2bba97e36c43ca22feee1d51a12ce6ac (patch)
treeeaa352df03cfe58d315e975bbe2a6384c801f221 /src/cpu/o3
parentaac93b7d0ce5e8e0241c7299b49cc59a9d095f3e (diff)
downloadgem5-9836d81c2bba97e36c43ca22feee1d51a12ce6ac.tar.xz
style: Use the correct m5 style for things relating to interrupts.
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/commit_impl.hh4
-rw-r--r--src/cpu/o3/cpu.cc4
-rw-r--r--src/cpu/o3/cpu.hh2
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh2
4 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 68fc6ef3b..46c4158f6 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -665,7 +665,7 @@ DefaultCommit<Impl>::handleInterrupt()
DPRINTF(Commit, "Interrupt pending, waiting for ROB to empty.\n");
}
} else if (commitStatus[0] != TrapPending &&
- cpu->check_interrupts(cpu->tcBase(0)) &&
+ cpu->checkInterrupts(cpu->tcBase(0)) &&
!trapSquash[0] &&
!tcSquash[0]) {
// Process interrupts if interrupts are enabled, not in PAL
@@ -695,7 +695,7 @@ DefaultCommit<Impl>::commit()
// Check for any interrupt, and start processing it. Or if we
// have an outstanding interrupt and are at a point when it is
// valid to take an interrupt, process it.
- if (cpu->check_interrupts(cpu->tcBase(0))) {
+ if (cpu->checkInterrupts(cpu->tcBase(0))) {
handleInterrupt();
}
#endif // FULL_SYSTEM
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 41b7e8b14..04f344930 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -895,9 +895,9 @@ FullO3CPU<Impl>::activateWhenReady(int tid)
#if FULL_SYSTEM
template <class Impl>
void
-FullO3CPU<Impl>::post_interrupt(int int_num, int index)
+FullO3CPU<Impl>::postInterrupt(int int_num, int index)
{
- BaseCPU::post_interrupt(int_num, index);
+ BaseCPU::postInterrupt(int_num, index);
if (this->thread[0]->status() == ThreadContext::Suspended) {
DPRINTF(IPI,"Suspended Processor awoke\n");
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 406d965be..8cfc9affa 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -412,7 +412,7 @@ class FullO3CPU : public BaseO3CPU
#if FULL_SYSTEM
/** Posts an interrupt. */
- void post_interrupt(int int_num, int index);
+ void postInterrupt(int int_num, int index);
/** HW return from error interrupt. */
Fault hwrei(unsigned tid);
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index a521c3636..d8ec70bb8 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -132,7 +132,7 @@ O3ThreadContext<Impl>::suspend(int delay)
/*
#if FULL_SYSTEM
// Don't change the status from active if there are pending interrupts
- if (cpu->check_interrupts()) {
+ if (cpu->checkInterrupts()) {
assert(status() == ThreadContext::Active);
return;
}