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authorKevin Lim <ktlim@umich.edu>2006-07-07 15:38:15 -0400
committerKevin Lim <ktlim@umich.edu>2006-07-07 15:38:15 -0400
commit018ba50f2c05e07c7bd1c951db8ba33402c323dc (patch)
treedf754aff776ffe6cb9ac6347bd463e4c5b253541 /src/cpu/o3
parent55e59e26c1a7acd8715262999451c451fc50b480 (diff)
downloadgem5-018ba50f2c05e07c7bd1c951db8ba33402c323dc.tar.xz
Switch out fixes for CPUs.
src/cpu/o3/cpu.cc: Fix up keeping proper state when switched out and drained. src/cpu/simple/timing.cc: src/cpu/simple/timing.hh: Keep track of the event we use to schedule fetch initially and upon resume. We may have to cancel the event if the CPU is switched out. --HG-- extra : convert_revision : 60a2a1bd2cdc67bd53ca4a67aa77166c826a4c8c
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/cpu.cc4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index f345fe82d..ceba74ef3 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -400,7 +400,8 @@ FullO3CPU<Impl>::tick()
}
if (!tickEvent.scheduled()) {
- if (_status == SwitchedOut) {
+ if (_status == SwitchedOut ||
+ getState() == SimObject::DrainedTiming) {
// increment stat
lastRunningCycle = curTick;
} else if (!activityRec.active()) {
@@ -793,6 +794,7 @@ FullO3CPU<Impl>::resume()
if (!tickEvent.scheduled())
tickEvent.schedule(curTick);
_status = Running;
+ changeState(SimObject::Timing);
}
template <class Impl>