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authorGabe Black <gblack@eecs.umich.edu>2008-02-26 23:38:51 -0500
committerGabe Black <gblack@eecs.umich.edu>2008-02-26 23:38:51 -0500
commit8b4796a367ec21d294f7318343e5bb9d7e07a53e (patch)
tree584199359a9a7aa3c7d842164b677d1a1e94a1f1 /src/cpu/o3
parent7bde0285e50e3903e38dd9e6fd59ea4a98f41079 (diff)
downloadgem5-8b4796a367ec21d294f7318343e5bb9d7e07a53e.tar.xz
TLB: Make a TLB base class and put a virtual demapPage function in it.
--HG-- extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/cpu.hh16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index e902968c1..61d7dcf22 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -263,6 +263,22 @@ class FullO3CPU : public BaseO3CPU
/** Registers statistics. */
void fullCPURegStats();
+ void demapPage(Addr vaddr, uint64_t asn)
+ {
+ this->itb->demapPage(vaddr, asn);
+ this->dtb->demapPage(vaddr, asn);
+ }
+
+ void demapInstPage(Addr vaddr, uint64_t asn)
+ {
+ this->itb->demapPage(vaddr, asn);
+ }
+
+ void demapDataPage(Addr vaddr, uint64_t asn)
+ {
+ this->dtb->demapPage(vaddr, asn);
+ }
+
/** Translates instruction requestion. */
Fault translateInstReq(RequestPtr &req, Thread *thread)
{