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authorAndreas Hansson <andreas.hansson@arm.com>2014-10-16 05:49:51 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-10-16 05:49:51 -0400
commita2d246b6b8379f9a74dbc56feefc155f615b5ea4 (patch)
treebbfaf7a39edebda5ca7ddac9af5e205823d37e10 /src/cpu/o3
parenta769963d16b7b259580fa2da1e84f62aae0a5a42 (diff)
downloadgem5-a2d246b6b8379f9a74dbc56feefc155f615b5ea4.tar.xz
arch: Use shared_ptr for all Faults
This patch takes quite a large step in transitioning from the ad-hoc RefCountingPtr to the c++11 shared_ptr by adopting its use for all Faults. There are no changes in behaviour, and the code modifications are mostly just replacing "new" with "make_shared".
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/dyn_inst_impl.hh2
-rw-r--r--src/cpu/o3/lsq_unit.hh7
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh17
3 files changed, 13 insertions, 13 deletions
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index fa3ce28fa..06c0e15f3 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -202,7 +202,7 @@ BaseO3DynInst<Impl>::hwrei()
#if THE_ISA == ALPHA_ISA
// Can only do a hwrei when in pal mode.
if (!(this->instAddr() & 0x3))
- return new AlphaISA::UnimplementedOpcodeFault;
+ return std::make_shared<AlphaISA::UnimplementedOpcodeFault>();
// Set the next PC based on the value of the EXC_ADDR IPR.
AlphaISA::PCState pc = this->pcState();
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index cfb9b8288..f90f72ced 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -61,7 +61,6 @@
#include "debug/LSQUnit.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
-#include "sim/fault_fwd.hh"
struct DerivO3CPUParams;
@@ -578,9 +577,9 @@ LSQUnit<Impl>::read(Request *req, Request *sreqLow, Request *sreqHigh,
delete sreqLow;
delete sreqHigh;
}
- return new GenericISA::M5PanicFault(
- "Uncachable load [sn:%llx] PC %s\n",
- load_inst->seqNum, load_inst->pcState());
+ return std::make_shared<GenericISA::M5PanicFault>(
+ "Uncachable load [sn:%llx] PC %s\n",
+ load_inst->seqNum, load_inst->pcState());
}
// Check the SQ for any previous stores that might lead to forwarding
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 0be4f57c4..887e971b4 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -498,7 +498,7 @@ LSQUnit<Impl>::checkSnoop(PacketPtr pkt)
pkt->getAddr(), ld_inst->seqNum);
// Mark the load for re-execution
- ld_inst->fault = new ReExec;
+ ld_inst->fault = std::make_shared<ReExec>();
} else {
DPRINTF(LSQUnit, "HitExternal Snoop for addr %#x [sn:%lli]\n",
pkt->getAddr(), ld_inst->seqNum);
@@ -558,10 +558,10 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst)
++lsqMemOrderViolation;
- return new GenericISA::M5PanicFault(
- "Detected fault with inst [sn:%lli] and "
- "[sn:%lli] at address %#x\n",
- inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
+ return std::make_shared<GenericISA::M5PanicFault>(
+ "Detected fault with inst [sn:%lli] and "
+ "[sn:%lli] at address %#x\n",
+ inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
}
}
@@ -585,9 +585,10 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst)
++lsqMemOrderViolation;
- return new GenericISA::M5PanicFault("Detected fault with "
- "inst [sn:%lli] and [sn:%lli] at address %#x\n",
- inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
+ return std::make_shared<GenericISA::M5PanicFault>(
+ "Detected fault with "
+ "inst [sn:%lli] and [sn:%lli] at address %#x\n",
+ inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
}
}