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| author | Andreas Hansson <andreas.hansson@arm.com> | 2015-02-16 03:33:28 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-02-16 03:33:28 -0500 |
| commit | d0e1b8a19c6d58a49e5288938e9b12f3f10b9f51 (patch) | |
| tree | f990864e7fb9ffaf11e3895e8337737941390aa2 /src/cpu/o3 | |
| parent | 07ce60bdfa57eedf00f533704b5a2da3fa01b553 (diff) | |
| download | gem5-d0e1b8a19c6d58a49e5288938e9b12f3f10b9f51.tar.xz | |
arch: Make readMiscRegNoEffect const throughout
Finally took the plunge and made this apply to all ISAs, not just ARM.
Diffstat (limited to 'src/cpu/o3')
| -rw-r--r-- | src/cpu/o3/cpu.cc | 2 | ||||
| -rw-r--r-- | src/cpu/o3/cpu.hh | 2 | ||||
| -rwxr-xr-x | src/cpu/o3/thread_context.hh | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index b48c66c37..434bfd7da 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -1205,7 +1205,7 @@ FullO3CPU<Impl>::verifyMemoryMode() const template <class Impl> TheISA::MiscReg -FullO3CPU<Impl>::readMiscRegNoEffect(int misc_reg, ThreadID tid) +FullO3CPU<Impl>::readMiscRegNoEffect(int misc_reg, ThreadID tid) const { return this->isa[tid]->readMiscRegNoEffect(misc_reg); } diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 09b7db867..5b33285c4 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -403,7 +403,7 @@ class FullO3CPU : public BaseO3CPU /** Register accessors. Index refers to the physical register index. */ /** Reads a miscellaneous register. */ - TheISA::MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid); + TheISA::MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid) const; /** Reads a misc. register, including any side effects the read * might have as defined by the architecture. diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index 952d365bf..87d87900c 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -228,7 +228,7 @@ class O3ThreadContext : public ThreadContext { return cpu->microPC(thread->threadId()); } /** Reads a miscellaneous register. */ - virtual MiscReg readMiscRegNoEffect(int misc_reg) + virtual MiscReg readMiscRegNoEffect(int misc_reg) const { return cpu->readMiscRegNoEffect(misc_reg, thread->threadId()); } /** Reads a misc. register, including any side-effects the |