summaryrefslogtreecommitdiff
path: root/src/cpu/o3
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2011-11-01 04:01:13 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-11-01 04:01:13 -0700
commit1268e0df1f3d16d804b31005acf8067415771518 (patch)
tree179079d7d6b441fc3ed06eb3e1aa5eedd0720610 /src/cpu/o3
parenteeb85a8575d4bff6bc054bafe295e8758f2d0ded (diff)
downloadgem5-1268e0df1f3d16d804b31005acf8067415771518.tar.xz
SE/FS: Expose the same methods on the CPUs in SE and FS modes.
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/cpu.cc13
-rw-r--r--src/cpu/o3/cpu.hh4
-rw-r--r--src/cpu/o3/dyn_inst.hh2
-rw-r--r--src/cpu/o3/dyn_inst_impl.hh27
4 files changed, 16 insertions, 30 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 1ffd014cd..08cf0a692 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -31,6 +31,7 @@
* Rick Strong
*/
+#include "arch/kernel_stats.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
@@ -38,6 +39,7 @@
#include "cpu/o3/isa_specific.hh"
#include "cpu/o3/thread_context.hh"
#include "cpu/activity.hh"
+#include "cpu/quiesce_event.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
#include "debug/Activity.hh"
@@ -45,15 +47,10 @@
#include "debug/Quiesce.hh"
#include "enums/MemoryMode.hh"
#include "sim/core.hh"
+#include "sim/process.hh"
#include "sim/stat_control.hh"
#include "sim/system.hh"
-#if FULL_SYSTEM
-#include "cpu/quiesce_event.hh"
-#else
-#include "sim/process.hh"
-#endif
-
#if USE_CHECKER
#include "cpu/checker/cpu.hh"
#endif
@@ -896,7 +893,6 @@ FullO3CPU<Impl>::activateWhenReady(ThreadID tid)
}
}
-#if FULL_SYSTEM
template <class Impl>
Fault
FullO3CPU<Impl>::hwrei(ThreadID tid)
@@ -973,7 +969,6 @@ FullO3CPU<Impl>::updateMemPorts()
for (ThreadID i = 0; i < size; ++i)
thread[i]->connectMemPorts(thread[i]->getTC());
}
-#endif
template <class Impl>
void
@@ -1594,7 +1589,6 @@ FullO3CPU<Impl>::wakeCPU()
schedule(tickEvent, nextCycle());
}
-#if FULL_SYSTEM
template <class Impl>
void
FullO3CPU<Impl>::wakeup()
@@ -1607,7 +1601,6 @@ FullO3CPU<Impl>::wakeup()
DPRINTF(Quiesce, "Suspended Processor woken\n");
this->threadContexts[0]->activate();
}
-#endif
template <class Impl>
ThreadID
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 8eb32fae6..6de6ea6ef 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -378,7 +378,6 @@ class FullO3CPU : public BaseO3CPU
/** Traps to handle given fault. */
void trap(Fault fault, ThreadID tid, StaticInstPtr inst);
-#if FULL_SYSTEM
/** HW return from error interrupt. */
Fault hwrei(ThreadID tid);
@@ -402,7 +401,6 @@ class FullO3CPU : public BaseO3CPU
/** Check if this address is a valid data address. */
bool validDataAddr(Addr addr) { return true; }
-#endif
/** Register accessors. Index refers to the physical register index. */
@@ -631,9 +629,7 @@ class FullO3CPU : public BaseO3CPU
/** Wakes the CPU, rescheduling the CPU if it's not already active. */
void wakeCPU();
-#if FULL_SYSTEM
virtual void wakeup();
-#endif
/** Gets a free thread id. Use if thread ids change across system. */
ThreadID getFreeTid();
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index e58eb99c5..1b101ede9 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -199,13 +199,11 @@ class BaseO3DynInst : public BaseDynInst<Impl>
this->setFloatRegOperandBits(this->staticInst.get(), idx, this->cpu->readFloatRegBits(prev_phys_reg));
}
}
-#if FULL_SYSTEM
/** Calls hardware return from error interrupt. */
Fault hwrei();
/** Traps to handle specified fault. */
void trap(Fault fault);
bool simPalCheck(int palFunc);
-#endif
/** Emulates a syscall. */
void syscall(int64_t callnum);
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 500d63de8..93ae83441 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -42,6 +42,7 @@
#include "base/cp_annotate.hh"
#include "cpu/o3/dyn_inst.hh"
+#include "sim/full_system.hh"
template <class Impl>
BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
@@ -143,7 +144,6 @@ BaseO3DynInst<Impl>::completeAcc(PacketPtr pkt)
return this->fault;
}
-#if FULL_SYSTEM
template <class Impl>
Fault
BaseO3DynInst<Impl>::hwrei()
@@ -188,24 +188,23 @@ BaseO3DynInst<Impl>::simPalCheck(int palFunc)
#endif
return this->cpu->simPalCheck(palFunc, this->threadNumber);
}
-#endif
template <class Impl>
void
BaseO3DynInst<Impl>::syscall(int64_t callnum)
{
-#if FULL_SYSTEM
- panic("Syscall emulation isn't available in FS mode.\n");
-#else
- // HACK: check CPU's nextPC before and after syscall. If it
- // changes, update this instruction's nextPC because the syscall
- // must have changed the nextPC.
- TheISA::PCState curPC = this->cpu->pcState(this->threadNumber);
- this->cpu->syscall(callnum, this->threadNumber);
- TheISA::PCState newPC = this->cpu->pcState(this->threadNumber);
- if (!(curPC == newPC)) {
- this->pcState(newPC);
+ if (FullSystem) {
+ panic("Syscall emulation isn't available in FS mode.\n");
+ } else {
+ // HACK: check CPU's nextPC before and after syscall. If it
+ // changes, update this instruction's nextPC because the syscall
+ // must have changed the nextPC.
+ TheISA::PCState curPC = this->cpu->pcState(this->threadNumber);
+ this->cpu->syscall(callnum, this->threadNumber);
+ TheISA::PCState newPC = this->cpu->pcState(this->threadNumber);
+ if (!(curPC == newPC)) {
+ this->pcState(newPC);
+ }
}
-#endif
}