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author | Akash Bagdia <akash.bagdia@arm.com> | 2014-05-09 18:58:46 -0400 |
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committer | Akash Bagdia <akash.bagdia@arm.com> | 2014-05-09 18:58:46 -0400 |
commit | 2b1a01ee6ccda9f046b1ceb13c90ee0635473959 (patch) | |
tree | 1877032b428dce5a8cbfd69f0f974b1015184a0d /src/cpu/o3 | |
parent | e940bac278a877699238f9c70748762ea9379db4 (diff) | |
download | gem5-2b1a01ee6ccda9f046b1ceb13c90ee0635473959.tar.xz |
cpu, arm: Allow the specification of a socket field
Allow the specification of a socket ID for every core that is reflected in the
MPIDR field in ARM systems. This allows studying multi-socket / cluster
systems with ARM CPUs.
Diffstat (limited to 'src/cpu/o3')
-rwxr-xr-x | src/cpu/o3/thread_context.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index ef72fdb03..a00d2ffa3 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -98,6 +98,9 @@ class O3ThreadContext : public ThreadContext /** Reads this CPU's ID. */ virtual int cpuId() const { return cpu->cpuId(); } + /** Reads this CPU's Socket ID. */ + virtual uint32_t socketId() const { return cpu->socketId(); } + virtual int contextId() const { return thread->contextId(); } virtual void setContextId(int id) { thread->setContextId(id); } |