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author | Andreas Hansson <andreas.hansson@arm.com> | 2014-01-24 15:29:29 -0600 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-01-24 15:29:29 -0600 |
commit | 7db542c0ddf8904bda00d3c73408172136cd48a3 (patch) | |
tree | 453740317ce3f495a1e1d03ecef34cb31a3d8af3 /src/cpu/o3 | |
parent | 6019d73db47382f27b8e88b38d375db05cc13da0 (diff) | |
download | gem5-7db542c0ddf8904bda00d3c73408172136cd48a3.tar.xz |
cpu: Relax check on squashed non-speculative instructions
This patch relaxes the check performed when squashing non-speculative
instructions, as it caused problems with loads that were marked ready,
and then stalled on a blocked cache. The assertion is now allowing
memory references to be non-faulting.
Diffstat (limited to 'src/cpu/o3')
-rw-r--r-- | src/cpu/o3/inst_queue_impl.hh | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index f0b682602..8f0249ced 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -1192,8 +1192,15 @@ InstructionQueue<Impl>::doSquash(ThreadID tid) NonSpecMapIt ns_inst_it = nonSpecInsts.find(squashed_inst->seqNum); + // we remove non-speculative instructions from + // nonSpecInsts already when they are ready, and so we + // cannot always expect to find them if (ns_inst_it == nonSpecInsts.end()) { - assert(squashed_inst->getFault() != NoFault); + // loads that became ready but stalled on a + // blocked cache are alreayd removed from + // nonSpecInsts, and have not faulted + assert(squashed_inst->getFault() != NoFault || + squashed_inst->isMemRef()); } else { (*ns_inst_it).second = NULL; |