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authorGabe Black <gblack@eecs.umich.edu>2012-01-07 02:16:37 -0800
committerGabe Black <gblack@eecs.umich.edu>2012-01-07 02:16:37 -0800
commit241cc0c8402f1b9f2ec20d1cc152d96930959b2a (patch)
tree666717370cc9db4775ef46c10f7d8a92a34f40e2 /src/cpu/o3
parentec936364b7238cddea7734ea79c6e04b52a683c6 (diff)
parent4b772782871f265cf7372c984ad750803396938c (diff)
downloadgem5-241cc0c8402f1b9f2ec20d1cc152d96930959b2a.tar.xz
Another merge with the main repository.
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/fetch_impl.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 686b40dc5..28fd434fe 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1051,8 +1051,8 @@ DefaultFetch<Impl>::checkSignalsAndUpdate(ThreadID tid)
if (fetchStatus[tid] != Squashing) {
- TheISA::PCState nextPC = fromDecode->decodeInfo[tid].nextPC;
- DPRINTF(Fetch, "Squashing from decode with PC = %s\n", nextPC);
+ DPRINTF(Fetch, "Squashing from decode with PC = %s\n",
+ fromDecode->decodeInfo[tid].nextPC);
// Squash unless we're already squashing
squashFromDecode(fromDecode->decodeInfo[tid].nextPC,
fromDecode->decodeInfo[tid].squashInst,