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authorAli Saidi <Ali.Saidi@ARM.com>2011-05-04 20:38:26 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2011-05-04 20:38:26 -0500
commit09a2be0c391d603bb4d56d6abf1b6d7868778879 (patch)
treedeb351d45bebc6bf71faebe90fc8159199967779 /src/cpu/o3
parent48f7fda706b854f053d66df5e14e0084df775910 (diff)
downloadgem5-09a2be0c391d603bb4d56d6abf1b6d7868778879.tar.xz
O3: Fix a small corner case with the lsq hazard detection logic.
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 1e7910387..2c2b30b8a 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -465,8 +465,7 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst)
Addr ld_eff_addr2 =
(ld_inst->effAddr + ld_inst->effSize - 1) >> depCheckShift;
- if ((inst_eff_addr2 > ld_eff_addr1 && inst_eff_addr1 < ld_eff_addr2) ||
- inst_eff_addr1 == ld_eff_addr1) {
+ if (inst_eff_addr2 >= ld_eff_addr1 && inst_eff_addr1 <= ld_eff_addr2) {
// A load/store incorrectly passed this load/store.
// Check if we already have a violator, or if it's newer
// squash and refetch.