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authorGabe Black <gblack@eecs.umich.edu>2007-04-08 01:54:08 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-04-08 01:54:08 +0000
commitd29979b04381a5a9845776bf47d2585c29cb1546 (patch)
treed7013b632fb6b4791c06f5f9aa9e0aa87947133a /src/cpu/o3
parenta3ed19f82a34626231ae7b5a024331b24645c01c (diff)
parent3bb5fd8c44bbac6cbcfd18aed5fd46c112d19d7f (diff)
downloadgem5-d29979b04381a5a9845776bf47d2585c29cb1546.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec --HG-- extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
Diffstat (limited to 'src/cpu/o3')
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index d558e2dfa..44e2cea76 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -647,7 +647,8 @@ LSQUnit<Impl>::writebackStores()
memcpy(inst->memData, storeQueue[storeWBIdx].data, req->getSize());
- PacketPtr data_pkt = new Packet(req, MemCmd::WriteReq,
+ MemCmd command = req->isSwap() ? MemCmd::SwapReq : MemCmd::WriteReq;
+ PacketPtr data_pkt = new Packet(req, command,
Packet::Broadcast);
data_pkt->dataStatic(inst->memData);
@@ -664,7 +665,7 @@ LSQUnit<Impl>::writebackStores()
inst->seqNum);
// @todo: Remove this SC hack once the memory system handles it.
- if (req->isLocked()) {
+ if (inst->isStoreConditional()) {
// Disable recording the result temporarily. Writing to
// misc regs normally updates the result, but this is not
// the desired behavior when handling store conditionals.