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| author | Gabe Black <gabeblack@google.com> | 2019-04-28 08:56:22 +0000 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-04-29 22:57:37 +0000 |
| commit | 88fc141f72bea768fdf8d6e22611a89f135cfc10 (patch) | |
| tree | 4e2292f8964180263805ea379a86d8ec72faa678 /src/cpu/o3 | |
| parent | a632ee72adc7056786752973ecfa44ae01fca137 (diff) | |
| download | gem5-88fc141f72bea768fdf8d6e22611a89f135cfc10.tar.xz | |
cpu: Get rid of the (read|set)RegOtherThread methods.
These are implemented by MIPS internally now.
Change-Id: If7465e1666e51e1314968efb56a5a814e62ee2d1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18436
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/cpu/o3')
| -rw-r--r-- | src/cpu/o3/dyn_inst.hh | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index 24c59a25d..01886606e 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -429,21 +429,6 @@ class BaseO3DynInst : public BaseDynInst<Impl> this->cpu->setCCReg(this->_destRegIdx[idx], val); BaseDynInst<Impl>::setCCRegOperand(si, idx, val); } - -#if THE_ISA == MIPS_ISA - RegVal - readRegOtherThread(const RegId& misc_reg, ThreadID tid) override - { - panic("MIPS MT not defined for O3 CPU.\n"); - return 0; - } - - void - setRegOtherThread(const RegId& misc_reg, RegVal val, ThreadID tid) override - { - panic("MIPS MT not defined for O3 CPU.\n"); - } -#endif }; #endif // __CPU_O3_ALPHA_DYN_INST_HH__ |