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| author | Gabor Dozsa <gabor.dozsa@arm.com> | 2018-02-15 11:46:19 +0000 |
|---|---|---|
| committer | Gabor Dozsa <gabor.dozsa@arm.com> | 2019-07-08 10:54:49 +0000 |
| commit | b81a66d7751124cb78d521bc259742c39a28b902 (patch) | |
| tree | b136ca2182aeed24e880e7e91244f8383279a3bb /src/cpu/o3 | |
| parent | 7b09869eacfe561b927de9a61c9ebcce750357cf (diff) | |
| download | gem5-b81a66d7751124cb78d521bc259742c39a28b902.tar.xz | |
cpu-o3: Reset fault status for mem access in pushRequest
Reset the fault status always before translation is initiated in
pushRequest() in the LSQ. This avoids the problem when a strictly
ordered load needs to be re-executed multiple times. If the
translation is delayed at one of those attempts then the
internal panicFault (from the previous execution attempt) can get
fired at commit.
Change-Id: I0c22b2f7afd6e2cb00bc359a4a01042efd2d01d2
Signed-off-by: Gabor Dozsa <gabor.dozsa@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19388
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/cpu/o3')
| -rw-r--r-- | src/cpu/o3/lsq_impl.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index 70621a523..d4e0a289e 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -724,6 +724,10 @@ LSQ<Impl>::pushRequest(const DynInstPtr& inst, bool isLoad, uint8_t *data, inst->setRequest(); req->taskId(cpu->taskId()); + // There might be fault from a previous execution attempt if this is + // a strictly ordered load + inst->getFault() = NoFault; + req->initiateTranslation(); } |