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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-03-29 13:02:05 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-04-10 08:41:53 +0000 |
| commit | daa9dcbc0c3fe4e5014855c8b31f1cfeb5f0af91 (patch) | |
| tree | 65b0e6feced44355aa991fa47ab892a1d5e2f50f /src/cpu/o3 | |
| parent | 7f9c98472c97f8f71f71c7386496af67fc886d03 (diff) | |
| download | gem5-daa9dcbc0c3fe4e5014855c8b31f1cfeb5f0af91.tar.xz | |
cpu: O3 switchFreeList checking VecElems instead of FloatRegs
Vector elements should be checked instead of floats since those are the
ones mapped to the vector registers.
Change-Id: I36088ab90e63720d846fcf5b43360da105b6c736
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17850
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/o3')
| -rw-r--r-- | src/cpu/o3/rename_map.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc index 603f1ff36..9d912e582 100644 --- a/src/cpu/o3/rename_map.cc +++ b/src/cpu/o3/rename_map.cc @@ -151,8 +151,9 @@ UnifiedRenameMap::switchFreeList(UnifiedFreeList* freeList) panic_if(freeList->hasFreeVecRegs(), "The free list is already tracking full Vec"); panic_if(freeList->numFreeVecElems() != - regFile->numVecElemPhysRegs() - TheISA::NumFloatRegs, - "The free list has lost vector register elements"); + regFile->numVecElemPhysRegs() - + TheISA::NumVecRegs * TheISA::NumVecElemPerVecReg, + "The free list has lost vector register elements"); auto range = regFile->getRegIds(VecRegClass); freeList->addRegs(range.first + TheISA::NumVecRegs, range.second); |