get rid of all instances of readTid() and getThreadNum(). Unify and eliminate

redundancies with threadId() as their replacement.

2 files changed, 56 insertions, 54 deletions

diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index c237b9587..8682e071e 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -82,6 +82,10 @@ class O3ThreadContext : public ThreadContext
 
     virtual void setContextId(int id) { thread->setContextId(id); }
 
+    /** Returns this thread's ID number. */
+    virtual int threadId() { return thread->threadId(); }
+    virtual void setThreadId(int id) { return thread->setThreadId(id); }
+
 #if FULL_SYSTEM
     /** Returns a pointer to the system. */
     virtual System *getSystemPtr() { return cpu->system; }
@@ -152,9 +156,6 @@ class O3ThreadContext : public ThreadContext
     /** Samples the function profiling information. */
     virtual void profileSample();
 #endif
-    /** Returns this thread's ID number. */
-    virtual int getThreadNum() { return thread->readTid(); }
-
     /** Returns the instruction this thread is currently committing.
      *  Only used when an instruction faults.
      */
@@ -190,36 +191,36 @@ class O3ThreadContext : public ThreadContext
 
     /** Reads this thread's PC. */
     virtual uint64_t readPC()
-    { return cpu->readPC(thread->readTid()); }
+    { return cpu->readPC(thread->threadId()); }
 
     /** Sets this thread's PC. */
     virtual void setPC(uint64_t val);
 
     /** Reads this thread's next PC. */
     virtual uint64_t readNextPC()
-    { return cpu->readNextPC(thread->readTid()); }
+    { return cpu->readNextPC(thread->threadId()); }
 
     /** Sets this thread's next PC. */
     virtual void setNextPC(uint64_t val);
 
     virtual uint64_t readMicroPC()
-    { return cpu->readMicroPC(thread->readTid()); }
+    { return cpu->readMicroPC(thread->threadId()); }
 
     virtual void setMicroPC(uint64_t val);
 
     virtual uint64_t readNextMicroPC()
-    { return cpu->readNextMicroPC(thread->readTid()); }
+    { return cpu->readNextMicroPC(thread->threadId()); }
 
     virtual void setNextMicroPC(uint64_t val);
 
     /** Reads a miscellaneous register. */
     virtual MiscReg readMiscRegNoEffect(int misc_reg)
-    { return cpu->readMiscRegNoEffect(misc_reg, thread->readTid()); }
+    { return cpu->readMiscRegNoEffect(misc_reg, thread->threadId()); }
 
     /** Reads a misc. register, including any side-effects the
      * read might have as defined by the architecture. */
     virtual MiscReg readMiscReg(int misc_reg)
-    { return cpu->readMiscReg(misc_reg, thread->readTid()); }
+    { return cpu->readMiscReg(misc_reg, thread->threadId()); }
 
     /** Sets a misc. register. */
     virtual void setMiscRegNoEffect(int misc_reg, const MiscReg &val);
@@ -257,7 +258,7 @@ class O3ThreadContext : public ThreadContext
 
     /** Executes a syscall in SE mode. */
     virtual void syscall(int64_t callnum)
-    { return cpu->syscall(callnum, thread->readTid()); }
+    { return cpu->syscall(callnum, thread->threadId()); }
 
     /** Reads the funcExeInst counter. */
     virtual Counter readFuncExeInst() { return thread->funcExeInst; }
@@ -271,7 +272,7 @@ class O3ThreadContext : public ThreadContext
 
     virtual uint64_t readNextNPC()
     {
-        return this->cpu->readNextNPC(this->thread->readTid());
+        return this->cpu->readNextNPC(this->thread->threadId());
     }
 
     virtual void setNextNPC(uint64_t val)
@@ -279,7 +280,7 @@ class O3ThreadContext : public ThreadContext
 #if THE_ISA == ALPHA_ISA
         panic("Not supported on Alpha!");
 #endif
-        this->cpu->setNextNPC(val, this->thread->readTid());
+        this->cpu->setNextNPC(val, this->thread->threadId());
     }
 
     /** This function exits the thread context in the CPU and returns
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index 50f6e58b3..735827ebc 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -64,6 +64,7 @@ O3ThreadContext<Impl>::takeOverFrom(ThreadContext *old_context)
     setStatus(old_context->status());
     copyArchRegs(old_context);
     setContextId(old_context->contextId());
+    setThreadId(old_context->threadId());
 
 #if !FULL_SYSTEM
     thread->funcExeInst = old_context->readFuncExeInst();
@@ -95,7 +96,7 @@ void
 O3ThreadContext<Impl>::activate(int delay)
 {
     DPRINTF(O3CPU, "Calling activate on Thread Context %d\n",
-            getThreadNum());
+            threadId());
 
     if (thread->status() == ThreadContext::Active)
         return;
@@ -105,14 +106,14 @@ O3ThreadContext<Impl>::activate(int delay)
 #endif
 
     if (thread->status() == ThreadContext::Unallocated) {
-        cpu->activateWhenReady(thread->readTid());
+        cpu->activateWhenReady(thread->threadId());
         return;
     }
 
     thread->setStatus(ThreadContext::Active);
 
     // status() == Suspended
-    cpu->activateContext(thread->readTid(), delay);
+    cpu->activateContext(thread->threadId(), delay);
 }
 
 template <class Impl>
@@ -120,7 +121,7 @@ void
 O3ThreadContext<Impl>::suspend(int delay)
 {
     DPRINTF(O3CPU, "Calling suspend on Thread Context %d\n",
-            getThreadNum());
+            threadId());
 
     if (thread->status() == ThreadContext::Suspended)
         return;
@@ -139,7 +140,7 @@ O3ThreadContext<Impl>::suspend(int delay)
 #endif
 */
     thread->setStatus(ThreadContext::Suspended);
-    cpu->suspendContext(thread->readTid());
+    cpu->suspendContext(thread->threadId());
 }
 
 template <class Impl>
@@ -147,13 +148,13 @@ void
 O3ThreadContext<Impl>::deallocate(int delay)
 {
     DPRINTF(O3CPU, "Calling deallocate on Thread Context %d delay %d\n",
-            getThreadNum(), delay);
+            threadId(), delay);
 
     if (thread->status() == ThreadContext::Unallocated)
         return;
 
     thread->setStatus(ThreadContext::Unallocated);
-    cpu->deallocateContext(thread->readTid(), true, delay);
+    cpu->deallocateContext(thread->threadId(), true, delay);
 }
 
 template <class Impl>
@@ -161,13 +162,13 @@ void
 O3ThreadContext<Impl>::halt(int delay)
 {
     DPRINTF(O3CPU, "Calling halt on Thread Context %d\n",
-            getThreadNum());
+            threadId());
 
     if (thread->status() == ThreadContext::Halted)
         return;
 
     thread->setStatus(ThreadContext::Halted);
-    cpu->haltContext(thread->readTid());
+    cpu->haltContext(thread->threadId());
 }
 
 template <class Impl>
@@ -245,7 +246,7 @@ O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc)
 {
     // This function will mess things up unless the ROB is empty and
     // there are no instructions in the pipeline.
-    unsigned tid = thread->readTid();
+    unsigned tid = thread->threadId();
     PhysRegIndex renamed_reg;
 
     // First loop through the integer registers.
@@ -292,7 +293,7 @@ uint64_t
 O3ThreadContext<Impl>::readIntReg(int reg_idx)
 {
     reg_idx = TheISA::flattenIntIndex(this, reg_idx);
-    return cpu->readArchIntReg(reg_idx, thread->readTid());
+    return cpu->readArchIntReg(reg_idx, thread->threadId());
 }
 
 template <class Impl>
@@ -302,9 +303,9 @@ O3ThreadContext<Impl>::readFloatReg(int reg_idx, int width)
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
     switch(width) {
       case 32:
-        return cpu->readArchFloatRegSingle(reg_idx, thread->readTid());
+        return cpu->readArchFloatRegSingle(reg_idx, thread->threadId());
       case 64:
-        return cpu->readArchFloatRegDouble(reg_idx, thread->readTid());
+        return cpu->readArchFloatRegDouble(reg_idx, thread->threadId());
       default:
         panic("Unsupported width!");
         return 0;
@@ -316,7 +317,7 @@ TheISA::FloatReg
 O3ThreadContext<Impl>::readFloatReg(int reg_idx)
 {
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    return cpu->readArchFloatRegSingle(reg_idx, thread->readTid());
+    return cpu->readArchFloatRegSingle(reg_idx, thread->threadId());
 }
 
 template <class Impl>
@@ -325,7 +326,7 @@ O3ThreadContext<Impl>::readFloatRegBits(int reg_idx, int width)
 {
     DPRINTF(Fault, "Reading floatint register through the TC!\n");
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    return cpu->readArchFloatRegInt(reg_idx, thread->readTid());
+    return cpu->readArchFloatRegInt(reg_idx, thread->threadId());
 }
 
 template <class Impl>
@@ -333,7 +334,7 @@ TheISA::FloatRegBits
 O3ThreadContext<Impl>::readFloatRegBits(int reg_idx)
 {
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    return cpu->readArchFloatRegInt(reg_idx, thread->readTid());
+    return cpu->readArchFloatRegInt(reg_idx, thread->threadId());
 }
 
 template <class Impl>
@@ -341,11 +342,11 @@ void
 O3ThreadContext<Impl>::setIntReg(int reg_idx, uint64_t val)
 {
     reg_idx = TheISA::flattenIntIndex(this, reg_idx);
-    cpu->setArchIntReg(reg_idx, val, thread->readTid());
+    cpu->setArchIntReg(reg_idx, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -356,16 +357,16 @@ O3ThreadContext<Impl>::setFloatReg(int reg_idx, FloatReg val, int width)
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
     switch(width) {
       case 32:
-        cpu->setArchFloatRegSingle(reg_idx, val, thread->readTid());
+        cpu->setArchFloatRegSingle(reg_idx, val, thread->threadId());
         break;
       case 64:
-        cpu->setArchFloatRegDouble(reg_idx, val, thread->readTid());
+        cpu->setArchFloatRegDouble(reg_idx, val, thread->threadId());
         break;
     }
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -374,10 +375,10 @@ void
 O3ThreadContext<Impl>::setFloatReg(int reg_idx, FloatReg val)
 {
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    cpu->setArchFloatRegSingle(reg_idx, val, thread->readTid());
+    cpu->setArchFloatRegSingle(reg_idx, val, thread->threadId());
 
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -388,11 +389,11 @@ O3ThreadContext<Impl>::setFloatRegBits(int reg_idx, FloatRegBits val,
 {
     DPRINTF(Fault, "Setting floatint register through the TC!\n");
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    cpu->setArchFloatRegInt(reg_idx, val, thread->readTid());
+    cpu->setArchFloatRegInt(reg_idx, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -401,11 +402,11 @@ void
 O3ThreadContext<Impl>::setFloatRegBits(int reg_idx, FloatRegBits val)
 {
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    cpu->setArchFloatRegInt(reg_idx, val, thread->readTid());
+    cpu->setArchFloatRegInt(reg_idx, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -413,11 +414,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setPC(uint64_t val)
 {
-    cpu->setPC(val, thread->readTid());
+    cpu->setPC(val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -425,11 +426,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setNextPC(uint64_t val)
 {
-    cpu->setNextPC(val, thread->readTid());
+    cpu->setNextPC(val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -437,11 +438,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setMicroPC(uint64_t val)
 {
-    cpu->setMicroPC(val, thread->readTid());
+    cpu->setMicroPC(val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -449,11 +450,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setNextMicroPC(uint64_t val)
 {
-    cpu->setNextMicroPC(val, thread->readTid());
+    cpu->setNextMicroPC(val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -461,11 +462,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
 {
-    cpu->setMiscRegNoEffect(misc_reg, val, thread->readTid());
+    cpu->setMiscRegNoEffect(misc_reg, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -474,11 +475,11 @@ void
 O3ThreadContext<Impl>::setMiscReg(int misc_reg,
                                                 const MiscReg &val)
 {
-    cpu->setMiscReg(misc_reg, val, thread->readTid());
+    cpu->setMiscReg(misc_reg, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -488,21 +489,21 @@ template <class Impl>
 TheISA::IntReg
 O3ThreadContext<Impl>::getSyscallArg(int i)
 {
-    return cpu->getSyscallArg(i, thread->readTid());
+    return cpu->getSyscallArg(i, thread->threadId());
 }
 
 template <class Impl>
 void
 O3ThreadContext<Impl>::setSyscallArg(int i, IntReg val)
 {
-    cpu->setSyscallArg(i, val, thread->readTid());
+    cpu->setSyscallArg(i, val, thread->threadId());
 }
 
 template <class Impl>
 void
 O3ThreadContext<Impl>::setSyscallReturn(SyscallReturn return_value)
 {
-    cpu->setSyscallReturn(return_value, thread->readTid());
+    cpu->setSyscallReturn(return_value, thread->threadId());
 }
 
 #endif // FULL_SYSTEM