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author | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-11 18:28:33 -0400 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-11 18:28:33 -0400 |
commit | 567afbf6ce5b2d6fe573878c39679e56a1bf5d15 (patch) | |
tree | ae5caee54ed390314e88a6eaa1dcb988cad96556 /src/cpu/op_class.hh | |
parent | 03c42ea5904ea5f9f5e8d634f6bc61992abef746 (diff) | |
download | gem5-567afbf6ce5b2d6fe573878c39679e56a1bf5d15.tar.xz |
More cache fixes. Atomic coherence now works as well.
src/cpu/memtest/memtest.cc:
src/cpu/memtest/memtest.hh:
Make Memtester able to test atomic as well
src/mem/bus.cc:
src/mem/bus.hh:
Handle atomic snoops properly for cache->cache transfers
src/mem/cache/cache_impl.hh:
Debug output.
Clean up memleak in atomic mode.
Set hitLatency.
Still need to send back reasonable number for atomic return value.
src/mem/packet.cc:
Add command strings for new commands
src/python/m5/objects/MemTest.py:
Add param to test atomic memory.
--HG--
extra : convert_revision : 43f880e29215776167c16ea90793ebf8122c785b
Diffstat (limited to 'src/cpu/op_class.hh')
0 files changed, 0 insertions, 0 deletions