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author | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-07 15:04:31 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-07 15:04:31 -0500 |
commit | 689cab36c90b56b3c8a7cda16d758acdd89f9de1 (patch) | |
tree | 2f0115320e0a6cfd13e5b054baa0ca13d5655519 /src/cpu/ozone/cpu.hh | |
parent | 329db76e47c825d4ecbe0f5251dbcfaf2ec09516 (diff) | |
download | gem5-689cab36c90b56b3c8a7cda16d758acdd89f9de1.tar.xz |
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
--HG--
extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
Diffstat (limited to 'src/cpu/ozone/cpu.hh')
-rw-r--r-- | src/cpu/ozone/cpu.hh | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh index baea7a546..2432df55e 100644 --- a/src/cpu/ozone/cpu.hh +++ b/src/cpu/ozone/cpu.hh @@ -235,14 +235,14 @@ class OzoneCPU : public BaseCPU public: // ISA stuff: + MiscReg readMiscRegNoEffect(int misc_reg); + MiscReg readMiscReg(int misc_reg); - MiscReg readMiscRegWithEffect(int misc_reg); + void setMiscRegNoEffect(int misc_reg, const MiscReg &val); void setMiscReg(int misc_reg, const MiscReg &val); - void setMiscRegWithEffect(int misc_reg, const MiscReg &val); - unsigned readStCondFailures() { return thread->storeCondFailures; } |