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author | Nathan Binkert <nate@binkert.org> | 2007-07-26 23:15:49 -0700 |
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committer | Nathan Binkert <nate@binkert.org> | 2007-07-26 23:15:49 -0700 |
commit | f0fef8f850b0c5aa73337ca11b26169163b2b2e1 (patch) | |
tree | d49d3492618ee85717554cddbe62cba1b5e7fb9c /src/cpu/ozone/cpu.hh | |
parent | 6b73ff43ff58502c80050c7aeff5a08a4ce61f87 (diff) | |
parent | cda354b07035f73a3b220f89014721300d36a815 (diff) | |
download | gem5-f0fef8f850b0c5aa73337ca11b26169163b2b2e1.tar.xz |
Merge python and x86 changes with cache branch
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
Diffstat (limited to 'src/cpu/ozone/cpu.hh')
-rw-r--r-- | src/cpu/ozone/cpu.hh | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh index 2432df55e..92b00af26 100644 --- a/src/cpu/ozone/cpu.hh +++ b/src/cpu/ozone/cpu.hh @@ -253,11 +253,17 @@ class OzoneCPU : public BaseCPU #if !FULL_SYSTEM TheISA::IntReg getSyscallArg(int i) - { return thread->renameTable[TheISA::ArgumentReg0 + i]->readIntResult(); } + { + assert(i < TheISA::NumArgumentRegs); + return thread->renameTable[TheISA::ArgumentReg[i]]->readIntResult(); + } // used to shift args for indirect syscall void setSyscallArg(int i, TheISA::IntReg val) - { thread->renameTable[TheISA::ArgumentReg0 + i]->setIntResult(i); } + { + assert(i < TheISA::NumArgumentRegs); + thread->renameTable[TheISA::ArgumentReg[i]]->setIntResult(i); + } void setSyscallReturn(SyscallReturn return_value) { cpu->setSyscallReturn(return_value, thread->readTid()); } |