summaryrefslogtreecommitdiff
path: root/src/cpu/ozone/cpu_impl.hh
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:20 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:20 -0700
commit25884a87733cd35ef6613aaef9a8a08194267552 (patch)
tree3eb831102c76206ba5ba4e19b94810be67ce108f /src/cpu/ozone/cpu_impl.hh
parent32daf6fc3fd34af0023ae74c2a1f8dd597f87242 (diff)
downloadgem5-25884a87733cd35ef6613aaef9a8a08194267552.tar.xz
Registers: Get rid of the float register width parameter.
Diffstat (limited to 'src/cpu/ozone/cpu_impl.hh')
-rw-r--r--src/cpu/ozone/cpu_impl.hh53
1 files changed, 0 insertions, 53 deletions
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index 25fa64071..f86b882d1 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -918,22 +918,6 @@ OzoneCPU<Impl>::OzoneTC::readIntReg(int reg_idx)
}
template <class Impl>
-TheISA::FloatReg
-OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx, int width)
-{
- int idx = reg_idx + TheISA::FP_Base_DepTag;
- switch(width) {
- case 32:
- return thread->renameTable[idx]->readFloatResult();
- case 64:
- return thread->renameTable[idx]->readDoubleResult();
- default:
- panic("Unsupported width!");
- return 0;
- }
-}
-
-template <class Impl>
double
OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx)
{
@@ -943,14 +927,6 @@ OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx)
template <class Impl>
uint64_t
-OzoneCPU<Impl>::OzoneTC::readFloatRegBits(int reg_idx, int width)
-{
- int idx = reg_idx + TheISA::FP_Base_DepTag;
- return thread->renameTable[idx]->readIntResult();
-}
-
-template <class Impl>
-uint64_t
OzoneCPU<Impl>::OzoneTC::readFloatRegBits(int reg_idx)
{
int idx = reg_idx + TheISA::FP_Base_DepTag;
@@ -970,27 +946,6 @@ OzoneCPU<Impl>::OzoneTC::setIntReg(int reg_idx, uint64_t val)
template <class Impl>
void
-OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val, int width)
-{
- int idx = reg_idx + TheISA::FP_Base_DepTag;
- switch(width) {
- case 32:
- panic("Unimplemented!");
- break;
- case 64:
- thread->renameTable[idx]->setDoubleResult(val);
- break;
- default:
- panic("Unsupported width!");
- }
-
- if (!thread->inSyscall) {
- cpu->squashFromTC();
- }
-}
-
-template <class Impl>
-void
OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val)
{
int idx = reg_idx + TheISA::FP_Base_DepTag;
@@ -1004,14 +959,6 @@ OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val)
template <class Impl>
void
-OzoneCPU<Impl>::OzoneTC::setFloatRegBits(int reg_idx, FloatRegBits val,
- int width)
-{
- panic("Unimplemented!");
-}
-
-template <class Impl>
-void
OzoneCPU<Impl>::OzoneTC::setFloatRegBits(int reg_idx, FloatRegBits val)
{
panic("Unimplemented!");