diff options
author | Ali Saidi <Ali.Saidi@ARM.com> | 2013-01-07 13:05:33 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2013-01-07 13:05:33 -0500 |
commit | 5146a69835bc9ba37fba7d3b0ff72ecaf9b98b74 (patch) | |
tree | 694786d4ffd6384a3736d48e1fd20e29408bf56d /src/cpu/ozone/cpu_impl.hh | |
parent | 90bd20aae2bc940397628a4598b5b25f2c8549b5 (diff) | |
download | gem5-5146a69835bc9ba37fba7d3b0ff72ecaf9b98b74.tar.xz |
cpu: rename the misleading inSyscall to noSquashFromTC
isSyscall was originally created because during handling of a syscall in SE
mode the threadcontext had to be updated. However, in many places this is used
in FS mode (e.g. fault handlers) and the name doesn't make much sense. The
boolean actually stops gem5 from squashing speculative and non-committed state
when a write to a threadcontext happens, so re-name the variable to something
more appropriate
Diffstat (limited to 'src/cpu/ozone/cpu_impl.hh')
-rw-r--r-- | src/cpu/ozone/cpu_impl.hh | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index 3a32c07c6..fe8ae2551 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -110,7 +110,7 @@ OzoneCPU<Impl>::OzoneCPU(Params *p) ozoneTC.cpu = this; ozoneTC.thread = &thread; - thread.inSyscall = false; + thread.noSquashFromTC = false; itb = p->itb; dtb = p->dtb; @@ -236,7 +236,7 @@ OzoneCPU<Impl>::takeOverFrom(BaseCPU *oldCPU) BaseCPU::takeOverFrom(oldCPU); thread.trapPending = false; - thread.inSyscall = false; + thread.noSquashFromTC = false; backEnd->takeOverFrom(); frontEnd->takeOverFrom(); @@ -375,7 +375,7 @@ OzoneCPU<Impl>::init() BaseCPU::init(); // Mark this as in syscall so it won't need to squash - thread.inSyscall = true; + thread.noSquashFromTC = true; if (FullSystem) { for (int i = 0; i < threadContexts.size(); ++i) { ThreadContext *tc = threadContexts[i]; @@ -387,7 +387,7 @@ OzoneCPU<Impl>::init() frontEnd->renameTable.copyFrom(thread.renameTable); backEnd->renameTable.copyFrom(thread.renameTable); - thread.inSyscall = false; + thread.noSquashFromTC = false; } template <class Impl> @@ -476,7 +476,7 @@ template <class Impl> void OzoneCPU<Impl>::squashFromTC() { - thread.inSyscall = true; + thread.noSquashFromTC = true; backEnd->generateTCEvent(); } @@ -487,7 +487,7 @@ OzoneCPU<Impl>::syscall(uint64_t &callnum) // Not sure this copy is needed, depending on how the TC proxy is made. thread.renameTable.copyFrom(backEnd->renameTable); - thread.inSyscall = true; + thread.noSquashFromTC = true; thread.funcExeInst++; @@ -497,7 +497,7 @@ OzoneCPU<Impl>::syscall(uint64_t &callnum) thread.funcExeInst--; - thread.inSyscall = false; + thread.noSquashFromTC = false; frontEnd->renameTable.copyFrom(thread.renameTable); backEnd->renameTable.copyFrom(thread.renameTable); @@ -774,7 +774,7 @@ OzoneCPU<Impl>::OzoneTC::setIntReg(int reg_idx, uint64_t val) { thread->renameTable[reg_idx]->setIntResult(val); - if (!thread->inSyscall) { + if (!thread->noSquashFromTC) { cpu->squashFromTC(); } } @@ -787,7 +787,7 @@ OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val) thread->renameTable[idx]->setDoubleResult(val); - if (!thread->inSyscall) { + if (!thread->noSquashFromTC) { cpu->squashFromTC(); } } @@ -806,7 +806,7 @@ OzoneCPU<Impl>::OzoneTC::setPC(Addr val) thread->PC = val; cpu->frontEnd->setPC(val); - if (!thread->inSyscall) { + if (!thread->noSquashFromTC) { cpu->squashFromTC(); } } @@ -818,7 +818,7 @@ OzoneCPU<Impl>::OzoneTC::setNextPC(Addr val) thread->nextPC = val; cpu->frontEnd->setNextPC(val); - if (!thread->inSyscall) { + if (!thread->noSquashFromTC) { cpu->squashFromTC(); } } @@ -844,7 +844,7 @@ OzoneCPU<Impl>::OzoneTC::setMiscRegNoEffect(int misc_reg, const MiscReg &val) // Needs to setup a squash event unless we're in syscall mode thread->miscRegFile.setRegNoEffect(misc_reg, val); - if (!thread->inSyscall) { + if (!thread->noSquashFromTC) { cpu->squashFromTC(); } } @@ -856,7 +856,7 @@ OzoneCPU<Impl>::OzoneTC::setMiscReg(int misc_reg, const MiscReg &val) // Needs to setup a squash event unless we're in syscall mode thread->miscRegFile.setReg(misc_reg, val, this); - if (!thread->inSyscall) { + if (!thread->noSquashFromTC) { cpu->squashFromTC(); } } |