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author | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-07 15:04:44 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-07 15:04:44 -0500 |
commit | 49527ab55312bf02dfce20c45db8f173b0c2324e (patch) | |
tree | b9212b195a7b253940aaaab5c8b9ef27e43d026e /src/cpu/ozone/cpu_impl.hh | |
parent | ea7bdf9f60c404761dfc568d5291c75747a2dd88 (diff) | |
parent | 689cab36c90b56b3c8a7cda16d758acdd89f9de1 (diff) | |
download | gem5-49527ab55312bf02dfce20c45db8f173b0c2324e.tar.xz |
Merge zizzer:/bk/newmem
into zeep.pool:/tmp/newmem
--HG--
extra : convert_revision : f078a05729b5fe464a06a58bc4adcb374f560572
Diffstat (limited to 'src/cpu/ozone/cpu_impl.hh')
-rw-r--r-- | src/cpu/ozone/cpu_impl.hh | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index a854de8de..4a76ae110 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -1089,24 +1089,24 @@ OzoneCPU<Impl>::OzoneTC::setNextPC(Addr val) template <class Impl> TheISA::MiscReg -OzoneCPU<Impl>::OzoneTC::readMiscReg(int misc_reg) +OzoneCPU<Impl>::OzoneTC::readMiscRegNoEffect(int misc_reg) { - return thread->miscRegFile.readReg(misc_reg); + return thread->miscRegFile.readRegNoEffect(misc_reg); } template <class Impl> TheISA::MiscReg -OzoneCPU<Impl>::OzoneTC::readMiscRegWithEffect(int misc_reg) +OzoneCPU<Impl>::OzoneTC::readMiscReg(int misc_reg) { - return thread->miscRegFile.readRegWithEffect(misc_reg, this); + return thread->miscRegFile.readReg(misc_reg, this); } template <class Impl> void -OzoneCPU<Impl>::OzoneTC::setMiscReg(int misc_reg, const MiscReg &val) +OzoneCPU<Impl>::OzoneTC::setMiscRegNoEffect(int misc_reg, const MiscReg &val) { // Needs to setup a squash event unless we're in syscall mode - thread->miscRegFile.setReg(misc_reg, val); + thread->miscRegFile.setRegNoEffect(misc_reg, val); if (!thread->inSyscall) { cpu->squashFromTC(); @@ -1115,10 +1115,10 @@ OzoneCPU<Impl>::OzoneTC::setMiscReg(int misc_reg, const MiscReg &val) template <class Impl> void -OzoneCPU<Impl>::OzoneTC::setMiscRegWithEffect(int misc_reg, const MiscReg &val) +OzoneCPU<Impl>::OzoneTC::setMiscReg(int misc_reg, const MiscReg &val) { // Needs to setup a squash event unless we're in syscall mode - thread->miscRegFile.setRegWithEffect(misc_reg, val, this); + thread->miscRegFile.setReg(misc_reg, val, this); if (!thread->inSyscall) { cpu->squashFromTC(); |