Remove mem parameter. Now the translating port asks the CPU's dcache's peer for its MemObject instead of having to have a paramter for the MemObject.

configs/example/fs.py:
configs/example/se.py:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/simple/timing.cc:
src/cpu/simple_thread.cc:
src/cpu/simple_thread.hh:
src/cpu/thread_state.cc:
src/cpu/thread_state.hh:
tests/configs/o3-timing-mp.py:
tests/configs/o3-timing.py:
tests/configs/simple-atomic-mp.py:
tests/configs/simple-atomic.py:
tests/configs/simple-timing-mp.py:
tests/configs/simple-timing.py:
tests/configs/tsunami-simple-atomic-dual.py:
tests/configs/tsunami-simple-atomic.py:
tests/configs/tsunami-simple-timing-dual.py:
tests/configs/tsunami-simple-timing.py:
    No need for mem parameter any more.
src/cpu/checker/cpu.cc:
    Use new constructor for simple thread (no more MemObject parameter).
src/cpu/checker/cpu.hh:
    Remove MemObject parameter.
src/cpu/memtest/memtest.hh:
    Ports now take in their MemObject owner.
src/cpu/o3/alpha/cpu_builder.cc:
    Remove mem parameter.
src/cpu/o3/alpha/cpu_impl.hh:
    Remove memory parameter and clean up handling of TranslatingPort.
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/mips/cpu_builder.cc:
src/cpu/o3/mips/cpu_impl.hh:
src/cpu/o3/params.hh:
src/cpu/o3/thread_state.hh:
src/cpu/ozone/cpu.hh:
src/cpu/ozone/cpu_builder.cc:
src/cpu/ozone/cpu_impl.hh:
src/cpu/ozone/front_end.hh:
src/cpu/ozone/front_end_impl.hh:
src/cpu/ozone/lw_lsq.hh:
src/cpu/ozone/lw_lsq_impl.hh:
src/cpu/ozone/simple_params.hh:
src/cpu/ozone/thread_state.hh:
src/cpu/simple/atomic.cc:
    Remove memory parameter.

--HG--
extra : convert_revision : 43cb44a33b31320d44b69679dcf646c0380d07d3

1 files changed, 3 insertions, 16 deletions

diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index bf547bf94..685bf3cb4 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -93,10 +93,10 @@ OzoneCPU<Impl>::OzoneCPU(Params *p)
 #if FULL_SYSTEM
     : BaseCPU(p), thread(this, 0), tickEvent(this, p->width),
 #else
-    : BaseCPU(p), thread(this, 0, p->workload[0], 0, p->mem),
+    : BaseCPU(p), thread(this, 0, p->workload[0], 0),
       tickEvent(this, p->width),
 #endif
-      mem(p->mem), comm(5, 5)
+      comm(5, 5)
 {
     frontEnd = new FrontEnd(p);
     backEnd = new BackEnd(p);
@@ -107,7 +107,6 @@ OzoneCPU<Impl>::OzoneCPU(Params *p)
 #if USE_CHECKER
         BaseCPU *temp_checker = p->checker;
         checker = dynamic_cast<Checker<DynInstPtr> *>(temp_checker);
-        checker->setMemory(mem);
 #if FULL_SYSTEM
         checker->setSystem(p->system);
 #endif
@@ -198,19 +197,7 @@ OzoneCPU<Impl>::OzoneCPU(Params *p)
     frontEnd->renameTable.copyFrom(thread.renameTable);
     backEnd->renameTable.copyFrom(thread.renameTable);
 
-#if !FULL_SYSTEM
-    /* Use this port to for syscall emulation writes to memory. */
-    Port *mem_port;
-    TranslatingPort *trans_port;
-    trans_port = new TranslatingPort(csprintf("%s-%d-funcport",
-                                              name(), 0),
-                                     p->workload[0]->pTable,
-                                     false);
-    mem_port = p->mem->getPort("functional");
-    mem_port->setPeer(trans_port);
-    trans_port->setPeer(mem_port);
-    thread.setMemPort(trans_port);
-#else
+#if FULL_SYSTEM
     Port *mem_port;
     FunctionalPort *phys_port;
     VirtualPort *virt_port;