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author | Ali Saidi <saidi@eecs.umich.edu> | 2008-10-20 16:22:59 -0400 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2008-10-20 16:22:59 -0400 |
commit | b760b99f4d9f5469d88c67ae8a06e5f9543a43e7 (patch) | |
tree | 39cb41ec58be172c0f4b65162ae637be42bbabb0 /src/cpu/ozone/cpu_impl.hh | |
parent | 4fac54f227f0ee0ee169955cb2510609434f7d85 (diff) | |
download | gem5-b760b99f4d9f5469d88c67ae8a06e5f9543a43e7.tar.xz |
O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes
the instruction after the hwrei to be fetched before the ITB/DTB_CM register is updated in a call pal
call sys and thus the translation fails because the user is attempting to access a super page address.
Minimally, it seems as though some sort of fetch stall or refetch after a hwrei is required. I think
this works currently because the hwrei uses the exec context interface, and the o3 stalls when that occurs.
Additionally, these changes don't update the LOCK register and probably break ll/sc. Both o3 changes were
removed since a great deal of manual patching would be required to only remove the hwrei change.
Diffstat (limited to 'src/cpu/ozone/cpu_impl.hh')
-rw-r--r-- | src/cpu/ozone/cpu_impl.hh | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index 94af07525..c8e0dfe3d 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -669,6 +669,21 @@ OzoneCPU<Impl>::setSyscallReturn(SyscallReturn return_value, int tid) } #else template <class Impl> +Fault +OzoneCPU<Impl>::hwrei() +{ + // Need to move this to ISA code + // May also need to make this per thread + + lockFlag = false; + lockAddrList.clear(); + thread.kernelStats->hwrei(); + + // FIXME: XXX check for interrupts? XXX + return NoFault; +} + +template <class Impl> void OzoneCPU<Impl>::processInterrupts() { @@ -685,6 +700,31 @@ OzoneCPU<Impl>::processInterrupts() interrupt->invoke(thread.getTC()); } } + +template <class Impl> +bool +OzoneCPU<Impl>::simPalCheck(int palFunc) +{ + // Need to move this to ISA code + // May also need to make this per thread + thread.kernelStats->callpal(palFunc, tc); + + switch (palFunc) { + case PAL::halt: + haltContext(thread.readTid()); + if (--System::numSystemsRunning == 0) + exitSimLoop("all cpus halted"); + break; + + case PAL::bpt: + case PAL::bugchk: + if (system->breakpoint()) + return false; + break; + } + + return true; +} #endif template <class Impl> |