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authorGabe Black <gblack@eecs.umich.edu>2006-12-12 18:10:00 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-12-12 18:10:00 -0500
commit90907f6b3cc79ec3e4bac2af7ef506672bab91e1 (patch)
treec089d7170e29e6829e420268ece72c0eeab0e820 /src/cpu/ozone/dyn_inst.hh
parent498e235ae0612d268001f813de6031fcdfc76de7 (diff)
parent6c8c86f2f97913788237f763d4810ab12730ca60 (diff)
downloadgem5-90907f6b3cc79ec3e4bac2af7ef506672bab91e1.tar.xz
Merge zizzer:/bk/newmem/
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 17d6c49ee15af5d192dedf82871159219d4277cd
Diffstat (limited to 'src/cpu/ozone/dyn_inst.hh')
-rw-r--r--src/cpu/ozone/dyn_inst.hh25
1 files changed, 14 insertions, 11 deletions
diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh
index 9445a5309..88f96b14b 100644
--- a/src/cpu/ozone/dyn_inst.hh
+++ b/src/cpu/ozone/dyn_inst.hh
@@ -146,12 +146,12 @@ class OzoneDynInst : public BaseDynInst<Impl>
// storage (which is pretty hard to imagine they would have reason
// to do).
- uint64_t readIntReg(const StaticInst *si, int idx)
+ uint64_t readIntRegOperand(const StaticInst *si, int idx)
{
return srcInsts[idx]->readIntResult();
}
- FloatReg readFloatReg(const StaticInst *si, int idx, int width)
+ FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
{
switch(width) {
case 32:
@@ -164,17 +164,18 @@ class OzoneDynInst : public BaseDynInst<Impl>
}
}
- FloatReg readFloatReg(const StaticInst *si, int idx)
+ FloatReg readFloatRegOperand(const StaticInst *si, int idx)
{
return srcInsts[idx]->readFloatResult();
}
- FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
+ FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+ int width)
{
return srcInsts[idx]->readIntResult();
}
- FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
+ FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
{
return srcInsts[idx]->readIntResult();
}
@@ -182,28 +183,30 @@ class OzoneDynInst : public BaseDynInst<Impl>
/** @todo: Make results into arrays so they can handle multiple dest
* registers.
*/
- void setIntReg(const StaticInst *si, int idx, uint64_t val)
+ void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
{
BaseDynInst<Impl>::setIntReg(si, idx, val);
}
- void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+ void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+ int width)
{
BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
}
- void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+ void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
{
BaseDynInst<Impl>::setFloatReg(si, idx, val);
}
- void setFloatRegBits(const StaticInst *si, int idx,
- FloatRegBits val, int width)
+ void setFloatRegOperandBits(const StaticInst *si, int idx,
+ FloatRegBits val, int width)
{
BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
}
- void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
+ void setFloatRegOperandBits(const StaticInst *si, int idx,
+ FloatRegBits val)
{
BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
}