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authorKevin Lim <ktlim@umich.edu>2006-11-12 20:15:30 -0500
committerKevin Lim <ktlim@umich.edu>2006-11-12 20:15:30 -0500
commit12e26c68c3e12a17c29b694012819bc7bae7bb5a (patch)
tree3ab0e4c9e00b26cb08a24249052d9db9db9bfd4d /src/cpu/ozone/front_end_impl.hh
parent73581bf80186d71e4f59f1c69b103074a90554f9 (diff)
downloadgem5-12e26c68c3e12a17c29b694012819bc7bae7bb5a.tar.xz
Updates to support new interrupt processing and removal of PcPAL.
src/arch/alpha/interrupts.hh: No need for this now that the ThreadContext is being used to set these IPRs in interrupts. Also split up the interrupt checking from the updating of the IPL and interrupt summary. src/arch/alpha/tlb.cc: Check the PC for whether or not it's in PAL mode, not the addr. src/cpu/o3/alpha/cpu.hh: Split up getting the interrupt from actually processing the interrupt. src/cpu/o3/alpha/cpu_impl.hh: Splut up the processing of interrupts. src/cpu/o3/commit_impl.hh: Update for ISA-oriented interrupt changes. src/cpu/o3/fetch_impl.hh: Fix broken if statement from PcPAL updates, and properly populate the request fields. Also more debugging output. src/cpu/ozone/cpu_impl.hh: Updates for ISA-oriented interrupt stuff. src/cpu/ozone/front_end_impl.hh: Populate request fields properly. src/cpu/simple/base.cc: Update for interrupt stuff. --HG-- extra : convert_revision : 9bac3f9ffed4948ee788699b2fa8419bc1ca647c
Diffstat (limited to 'src/cpu/ozone/front_end_impl.hh')
-rw-r--r--src/cpu/ozone/front_end_impl.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/ozone/front_end_impl.hh b/src/cpu/ozone/front_end_impl.hh
index 73ca6afbe..198ce0308 100644
--- a/src/cpu/ozone/front_end_impl.hh
+++ b/src/cpu/ozone/front_end_impl.hh
@@ -476,8 +476,8 @@ FrontEnd<Impl>::fetchCacheLine()
// Setup the memReq to do a read of the first isntruction's address.
// Set the appropriate read size and flags as well.
- memReq = new Request(0, fetch_PC, cacheBlkSize, flags,
- fetch_PC, cpu->readCpuId(), 0);
+ memReq = new Request(0, fetch_PC, cacheBlkSize, 0,
+ PC, cpu->readCpuId(), 0);
// Translate the instruction request.
fault = cpu->translateInstReq(memReq, thread);