Changes to get OzoneCPU to compile once more.

The changes largely are fixing up the memory accesses to use ports/Requests/Packets, supporting the splitting off of instantiation of template classes, and handling some of the reorganization that happened.

OzoneCPU is untested for now but at least compiles.  Fixes will be coming shortly.

SConstruct:
    Remove OzoneSimpleCPU from list of CPUs.
src/cpu/SConscript:
    Leave out OzoneSimpleCPU.
src/cpu/ozone/bpred_unit.cc:
    Fixes to get OzoneCPU to compile.
src/cpu/ozone/checker_builder.cc:
src/cpu/ozone/cpu.cc:
src/cpu/ozone/cpu.hh:
src/cpu/ozone/cpu_builder.cc:
src/cpu/ozone/cpu_impl.hh:
src/cpu/ozone/dyn_inst.hh:
src/cpu/ozone/dyn_inst_impl.hh:
src/cpu/ozone/front_end.cc:
src/cpu/ozone/front_end.hh:
src/cpu/ozone/front_end_impl.hh:
src/cpu/ozone/lw_back_end.hh:
src/cpu/ozone/lw_back_end_impl.hh:
src/cpu/ozone/lw_lsq.hh:
src/cpu/ozone/lw_lsq_impl.hh:
src/cpu/ozone/ozone_impl.hh:
src/cpu/ozone/rename_table.cc:
src/cpu/ozone/simple_params.hh:
src/cpu/ozone/thread_state.hh:
    Fixes to get OzoneCPU back to compiling.

--HG--
extra : convert_revision : 90ffb397263bcf9fea3987317272c64f2b20f7e6

1 files changed, 4 insertions, 44 deletions

diff --git a/src/cpu/ozone/lw_back_end.hh b/src/cpu/ozone/lw_back_end.hh
index bb81f60c8..bb3ef3a72 100644
--- a/src/cpu/ozone/lw_back_end.hh
+++ b/src/cpu/ozone/lw_back_end.hh
@@ -60,9 +60,9 @@ class LWBackEnd
     typedef typename Impl::Params Params;
     typedef typename Impl::DynInst DynInst;
     typedef typename Impl::DynInstPtr DynInstPtr;
-    typedef typename Impl::FullCPU FullCPU;
+    typedef typename Impl::OzoneCPU OzoneCPU;
     typedef typename Impl::FrontEnd FrontEnd;
-    typedef typename Impl::FullCPU::CommStruct CommStruct;
+    typedef typename Impl::OzoneCPU::CommStruct CommStruct;
 
     struct SizeStruct {
         int size;
@@ -95,35 +95,13 @@ class LWBackEnd
         const char *description();
     };
 
-    /** LdWriteback event for a load completion. */
-    class LdWritebackEvent : public Event {
-      private:
-        /** Instruction that is writing back data to the register file. */
-        DynInstPtr inst;
-        /** Pointer to IEW stage. */
-        LWBackEnd *be;
-
-        bool dcacheMiss;
-
-      public:
-        /** Constructs a load writeback event. */
-        LdWritebackEvent(DynInstPtr &_inst, LWBackEnd *be);
-
-        /** Processes writeback event. */
-        virtual void process();
-        /** Returns the description of the writeback event. */
-        virtual const char *description();
-
-        void setDcacheMiss() { dcacheMiss = true; be->addDcacheMiss(inst); }
-    };
-
     LWBackEnd(Params *params);
 
     std::string name() const;
 
     void regStats();
 
-    void setCPU(FullCPU *cpu_ptr);
+    void setCPU(OzoneCPU *cpu_ptr);
 
     void setFrontEnd(FrontEnd *front_end_ptr)
     { frontEnd = front_end_ptr; }
@@ -239,7 +217,7 @@ class LWBackEnd
     void updateComInstStats(DynInstPtr &inst);
 
   public:
-    FullCPU *cpu;
+    OzoneCPU *cpu;
 
     FrontEnd *frontEnd;
 
@@ -273,24 +251,6 @@ class LWBackEnd
 
     RenameTable<Impl> renameTable;
   private:
-    class DCacheCompletionEvent : public Event
-    {
-      private:
-        LWBackEnd *be;
-
-      public:
-        DCacheCompletionEvent(LWBackEnd *_be);
-
-        virtual void process();
-        virtual const char *description();
-    };
-
-    friend class DCacheCompletionEvent;
-
-    DCacheCompletionEvent cacheCompletionEvent;
-
-    MemInterface *dcacheInterface;
-
     // General back end width. Used if the more specific isn't given.
     int width;